# US 2019/0316795 A1 · Hvac controller having multiplexed input signal detection and method of operation thereof

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- Number: US 2019/0316795 A1
- Document ID: US20190316795A1
- Status: Published application
- Kind: A1
- Application number: 16/452,881
- Filed: 2019-06-26
- Published: 2019-10-17
- Earliest claimed: 2014-05-19
- Assignees: Lennox Industries Inc.
- Applicants: Lennox Industries Inc.
- Inventors: Darko Hadzidedic; Sakthi Narayan Kumar Murugesan; Anitha Rajappan
- Web page: https://patentgrep.com/patent/US20190316795A1

## CPC

- F24F 11/30: for purposes related to the operation of the system, e.g. for safety or monitoring
- F24F 11/56: Remote control
- F24F 11/88: Electrical aspects, e.g. circuits
- G05B 15/02: electric
- G05D 23/1917: {using digital means}
- G05D 23/1927: {using a plurality of sensors (G05D23/1902, G05D23/1917, and G05D23/1919 take precedence)}
- F24F: AIR-CONDITIONING; AIR-HUMIDIFICATION; VENTILATION; USE OF AIR CURRENTS FOR SCREENING (removing dirt or fumes from areas where they are produced B08B15/00; vertical ducts for carrying away waste gases from buildings E04F17/02; tops for chimneys or ventilating shafts, terminals for flues F23L17/02)
- G05B: CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS (systems for controlling or regulating non-electric variables G05D; systems for regulating electric or magnetic variables G05F; control devices or systems insofar as characterised by mechanical features only G05G)
- G05D: SYSTEMS FOR CONTROLLING OR REGULATING NON-ELECTRIC VARIABLES

## Abstract

A heating, ventilation and air conditioning (HVAC) controller, a method of detecting multiplexed input signals and an HVAC system employing the controller or the method. In one embodiment, the HVAC controller includes: (1) a signal conditioner configured to convert received alternating current (AC) input signals into corresponding square wave signals of a digital logic voltage, (2) a multiplexer coupled to the signal conditioner and configured to select one of the square wave signals and (3) a sample analyzer coupled to the multiplexer and configured to evaluate multiple samples of the selected one of the square wave signals to derive a binary state.

## Claims

### Claim 1

A method comprising:
converting, using a signal conditioner, received alternating current (AC) input signals into corresponding square wave signals of a digital logic voltage;
selecting, using a multiplexer coupled to the signal conditioner, one of the square wave signals;
evaluating, using a sample analyzer coupled to the multiplexer, multiple samples of the selected one of the square wave signals to derive a binary state, wherein the sample analyzer comprises a gate and a counter and is configured to employ a clock signal to sample the selected one of the square wave signals;
determining, using the counter, a total number of assertions of the selected one of the square wave signals occurring during a window of time;
responsive to a determination that the total number of assertions of the selected one of the square wave signals reaches a threshold number of assertions during the window of time, the derived binary state is assumed to be one; and
responsive to a determination that the total number of assertions of the selected one of the square wave signals does not reach the threshold number of assertions during the window of time, the derived binary state is assumed to be zero.

### Claim 2 (depends on 1)

The method of claim 1, wherein the multiplexer is further coupled to an interrupt pin of a processor and the sample analyzer is embodied in a selected one of interrupt-handling software and firmware executing in the processor.

### Claim 3 (depends on 1)

The method of claim 1, comprising:
providing the binary state to an interrupt pin of a processor.

### Claim 4 (depends on 1)

The method of claim 1, wherein the threshold number of assertions is 20.

### Claim 5 (depends on 1)

The method of claim 1, wherein the AC input signals are at a control voltage and the square wave signals are at the digital logic voltage.

### Claim 6 (depends on 1)

The method of claim 1 comprising:
selecting, using the multiplexer, among the square wave signals in a round-robin manner.

### Claim 7

A method of detecting multiplexed input signals, comprising:
converting received AC input signals into corresponding square wave signals of a digital logic voltage;
selecting one of the square wave signals; and
evaluating multiple samples of the selected one of the square wave signals to derive a binary state.

### Claim 8 (depends on 7)

The method of claim 7, wherein the selecting comprises providing one of the square wave signals to an interrupt pin of a processor and the evaluating is carried out by a selected one of interrupt-handling software and firmware executing in the processor.

### Claim 9 (depends on 7)

The method of claim 7, wherein the evaluating comprises providing the binary state to an interrupt pin of a processor.

### Claim 10 (depends on 9)

The method of claim 9, wherein the evaluating comprises:
employing a clock signal to sample the selected one of the square wave signals; and
asserting a signal on the interrupt pin if at least a threshold number of assertions is reached during a window of time.

### Claim 11 (depends on 10)

The method of claim 10, wherein the threshold number of assertions is 20.

### Claim 12 (depends on 7)

The method of claim 7, wherein the AC input signals are at a control voltage and the square wave signals are at a digital logic voltage.

### Claim 13 (depends on 7)

The method of claim 7, wherein the selecting is carried out in a round-robin manner.

### Claim 14

A heating, ventilation, and air conditioning (HVAC) system, comprising:
a compressor;
a furnace;
a blower; and
a controller associated with the compressor, the furnace and the blower, the controller having:
a signal conditioner configured to convert alternating current (AC) input signals into corresponding square wave signals of a digital logic voltage;
a multiplexer configured to select one of the square wave signals;
a sample analyzer configured to evaluate multiple samples of the selected one of the square wave signals to derive a binary state;
wherein the sample analyzer is configured to employ a clock signal to sample the selected one of the square wave signals;
wherein the sample analyzer is configured to determine a total number of assertions of the selected one of the square wave signals occurring during a window of time; and
responsive to a determination that the total number of assertions of the selected one of the square wave signals reaches a threshold number of assertions during the window of time, the derived binary state is assumed to be one.

### Claim 15 (depends on 14)

The system of claim 14, wherein responsive to a determination that the total number of assertions of the selected one of the square wave signals does not reach the threshold number of assertions during the window of time, the derived binary state is assumed to be zero.

### Claim 16 (depends on 14)

The system of claim 14, wherein the multiplexer is further coupled to an interrupt pin of a processor and the sample analyzer is embodied in a selected one of interrupt-handling software and firmware executing in the processor.

### Claim 17 (depends on 14)

The system of claim 14, wherein the sample analyzer is further configured to provide the binary state to an interrupt pin of a processor.

### Claim 18 (depends on 14)

The system of claim 14, wherein the threshold number of assertions is 20.

### Claim 19 (depends on 14)

The system of claim 14, wherein the AC input signals are at a control voltage and the square wave signals are at the digital logic voltage.

### Claim 20 (depends on 14)

The system of claim 14, wherein the multiplexer is configured to select among the square wave signals in a round-robin manner.