Exactly-once transaction semantics for fault tolerant fpga based transaction systems
AssigneeTata Consultancy Services Limited
InventorsManoj Karunakaran NAMBIAR, Swapnil RODI, Sunil PURANIK, Mahesh BARVE
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AssigneeTata Consultancy Services Limited
InventorsManoj Karunakaran NAMBIAR, Swapnil RODI, Sunil PURANIK, Mahesh BARVE
Estimating the term…
This disclosure relates generally to methods and systems for providing exactly-once transaction semantics for fault tolerant FPGA based transaction systems. The systems comprise middleware components in a server as well as client end. The server comprises Hosts and FPGAs. The FPGAs control transaction execution (the application processing logic also resides in the FPGA) and provide fault tolerance with high performance by means of a modified TCP implementation. The Hosts buffer and persist transaction records for failure recovery and achieving exactly-once transaction semantics. The monitoring and fault detecting components are distributed across the FPGAs and Hosts. Exactly-once transaction semantics is implemented without sacrificing performance by switching between a high performance mode and a conservative mode depending on component failures. PCIE switches for connectivity between FPGAs and Hosts ensure FPGAs are available even if Hosts fail. When FPGAs provide higher processing elements and memory, the Hosts may be eliminated.
A Field Programmable Gate Array (FPGA) based transaction system (100) comprising:
A Field Programmable Gate Array (FPGA) based transaction system (200) comprising:
A method (300) comprising:
Dependencies are inferred from the claim text.