Memory system and control method
AssigneeToshiba Memory Corporation
InventorsHironori Uchikawa, Toshikatsu Hida
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AssigneeToshiba Memory Corporation
InventorsHironori Uchikawa, Toshikatsu Hida
Estimating the term…
According to one embodiment, a memory system encodes a plurality of data frames written in the same block in an inter-frame direction and generates first parity data, encodes the first parity data in the inter-frame direction and generates second parity data, generates a plurality of pieces of first frame data by concatenating at least a part of the first or second parity data with each of the plurality of data frames, encodes each of the plurality of pieces of first frame data in an intra-frame direction and generates a plurality of third parity data, and writes a plurality of pieces of second frame data obtained by concatenating each of the plurality of pieces of first frame data and each of the plurality of pieces of third parity data in a plurality of pages in the same block in the non-volatile memory one by one.
A memory system, comprising:
A memory system, comprising:
A control method of a memory system including a non-volatile memory including a plurality of blocks and a memory interface that executes writing and reading on the non-volatile memory, each block including a plurality of pages, the control method comprising:
A control method of a memory system including a non-volatile memory including a plurality of blocks and a memory interface that executes writing and reading on the non-volatile memory, each block including a plurality of pages, the control method comprising:
Dependencies are inferred from the claim text.