Thin film transistor array panel
AssigneeSamsung Display Co., Ltd.
InventorsDo Hyung KIM, Gun Hee KIM, Hyeon Sik KIM, Sang Ho PARK, Joo Hee JEON
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Abstract
A thin film transistor array panel includes a substrate, a first gate electrode on the substrate, a semiconductor layer on the first gate electrode, the semiconductor layer including a drain region, a source region, a lightly doped drain (LDD) region, and a channel region, a second gate electrode on the semiconductor layer, the first gate electrode and the second gate electrode each overlapping the channel region, a control gate electrode that overlaps the LDD region, and a source electrode and a drain electrode respectively connected with the source region and the drain region of the semiconductor layer.
Claims19
A thin film transistor array panel, comprising:
- a substrate;
- a first gate electrode on the substrate;
- a semiconductor layer on the first gate electrode, the semiconductor layer including a drain region, a source region, a lightly doped drain (LDD) region, and a channel region;
- a second gate electrode on the semiconductor layer, the first gate electrode and the second gate electrode each overlapping the channel region;
- a control gate electrode that overlaps the LDD region;
- and
- a source electrode and a drain electrode respectively connected with the source region and the drain region of the semiconductor layer.
A thin film transistor array panel, comprising:
- a substrate;
- a gate electrode on the substrate;
- a control gate electrode on a same layer as the gate electrode;
- a semiconductor layer on the gate electrode and the control gate electrode, the semiconductor layer including a channel that overlaps the gate electrode, a LDD region that overlaps the control gate electrode, a source region, and a drain region;
- and
- a source electrode and a drain electrode connected with the semiconductor layer.
A thin film transistor array panel, comprising:
- a substrate;
- a gate electrode on the substrate;
- a semiconductor layer on the gate electrode, the semiconductor layer including a source region, a drain region, and a channel region;
- a control gate electrode on the semiconductor layer, the control gate electrode not overlapping the gate electrode;
- and
- a source electrode and a drain electrode connected with the semiconductor layer.
Dependencies are inferred from the claim text.