Semiconductor apparatus and manufacturing method thereof

A semiconductor apparatus comprising:

• a first nitride semiconductor layer including a first region having a first upper surface, a second region having a second upper surface parallel to the first upper surface, and a third region provided between the first region and the second region and having a third upper surface inclined at an angle of 88° to 90° with respect to the first upper surface or the second upper surface;
• a second nitride semiconductor layer provided on the first nitride semiconductor layer, the second nitride semiconductor including a fourth upper surface provided above the first upper surface, a fifth upper surface provided above the second upper surface and a sixth upper surface parallel to the third upper surface, the fourth upper surface being parallel to the first upper surface and being a +c face, the fifth upper surface being parallel to the second upper surface and being a +c face and the second nitride semiconductor layer having a bandgap larger than that of the first nitride semiconductor layer;
• a source electrode provided on the fourth upper surface;
• a drain electrode provided on the fifth upper surface;
• a gate insulating film provided to be in contact with the sixth upper surface;
• and
• a gate electrode provided to be in contact with the gate insulating film.

A manufacturing method of a semiconductor apparatus, comprising:

• forming a first nitride semiconductor layer on a substrate, the first nitride semiconductor layer being provided over a first region, a second region, and a third region between the first region and the second region and the first nitride semiconductor layer having a first upper surface;
• forming a second upper surface in the first region by removing a part of the first nitride semiconductor layer of the first region, the second upper surface being parallel to the first upper surface;
• forming a third upper surface in the third region by removing a part of the first nitride semiconductor layer of the third region, the third upper surface being inclined with respect to the first upper surface or the second upper surface;
• forming a second nitride semiconductor layer having a fourth upper surface provided above the second upper surface, a fifth upper surface provided above the first upper surface and a sixth upper surface provided above the third upper surface, the fourth upper surface being parallel to the second upper surface and being a +c face, the fifth upper surface being parallel to the first upper surface and being a +c face, the sixth upper surface being parallel to the third upper surface and the second nitride semiconductor layer having a bandgap larger than that of the first nitride semiconductor layer;
• forming a source electrode on the fourth upper surface;
• forming a drain electrode on the fifth upper surface;
• forming a gate insulating film on the sixth upper surface;
• and
• forming a gate electrode on the gate insulating film.