Inner spacer formation and contact resistance reduction in nanosheet transistors
AssigneeInternational Business Machines Corporation
InventorsKangguo Cheng, Choonghyun Lee, Juntao Li, Peng Xu
Life of this patent
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Abstract
Embodiments of the invention are directed to a method of fabricating a semiconductor device. A non-limiting example of the method includes performing fabrication operations to form a nanosheet field effect transistor device, wherein the fabrication operations include forming a stack over a substrate. The stack includes alternating layers of sacrificial nanosheets and channel nanosheets over a substrate. The stack further includes lateral sidewalls having a length (L) and end sidewalls having a width (W), wherein L is greater than W. Source or drain (S/D) regions are formed along the length (L) of the lateral sidewalls.
Claims20
A method of fabricating a semiconductor device, the method comprising:
- performing fabrication operations to form a nanosheet field effect transistor device, wherein the fabrication operations include:
- forming a stack over a substrate;
- wherein the stack comprises alternating layers of sacrificial nanosheets and channel nanosheets over the substrate;
- wherein the stack further comprises lateral sidewalls having a length (L) and end sidewalls having a width (W);
- wherein L is greater than W;
- forming source or drain (S/D) regions along the length (L) of the lateral sidewalls;
- and
- forming a cavity in portions of the sacrificial nanosheet, wherein the sacrificial nanosheet comprises a first type of semiconductor material and a second type of semiconductor material.
(canceled)
A method of fabricating a semiconductor device, the method comprising:
- performing fabrication operations to form a nanosheet field effect transistor device, wherein the fabrication operations include:
- forming a stack over a substrate;
- wherein the stack comprises alternating layers of sacrificial nanosheets and channel nanosheets over the substrate;
- wherein the stack comprises lateral sidewalls having a length (L) and end sidewalls having a width (W);
- wherein L is greater than W;
- forming, using an epitaxial growth process, source or drain (S/D) regions along the length (L) of the lateral sidewalls;
- and
- forming inner spacers by performing a chemical reaction that comprises converting an oxide of a second type of semiconductor material to an oxide of a first type of semiconductor material;
- wherein forming the inner spacers further comprises forming a cavity in portions of the sacrificial nanosheet;
- and
- wherein the sacrificial nanosheet comprises the first type of semiconductor material and the second type of semiconductor material.
(canceled)
A nanosheet field effect transistor device comprising:
- a stack formed over a substrate;
- wherein the stack comprises alternating layers of sacrificial nanosheets and channel nanosheets over the substrate;
- wherein the stack comprises lateral sidewalls having a length (L) and end sidewalls having a width (W);
- wherein L is greater than W;
- source or drain (S/D) regions epitaxially grown along the length (L) of the lateral sidewalls;
- and
- inner spacers formed adjacent portions of the sacrificial nanosheet layers;
- wherein the sacrificial nanosheet comprises a first type of semiconductor material and a second type of semiconductor material;
- and
- wherein the inner spacers comprise an oxide of the first type of semiconductor material, wherein the oxide of the first type of material comprises a result from a chemical reaction between an oxide of the second type of semiconductor material and the sacrificial inner spacers.
Dependencies are inferred from the claim text.