Thin film transistors for high voltage applications

A system comprising:

• a memory to store instructions;
• a processor coupled to the memory, and to execute the instructions;
• a die comprising at least one of the processor or the memory, wherein a Back End of Line (BEOL) device of the die comprises:
• a gate, a source, and a drain, and
• a semiconductor body coupled to the gate,
• wherein the semiconductor body defines a recess, such that a top section of a first sidewall of the recess is adjacent to the source and a top section of a second sidewall of the recess is adjacent to the drain;
• and
• a wireless interface to allow the processor to communicate with another device.

A method for forming a back-gated thin film transistor (TFT) apparatus, the method comprising:

• forming a gate comprising metal;
• forming at least two layers over the gate, individual ones of the at least two layers comprising corresponding dielectric material;
• forming a semiconductor body over the least two layers;
• and
• selectively etching the semiconductor body to form a recess within the semiconductor body.