Vertical semiconductor devices and methods of manufacturing the same

A vertical semiconductor device, comprising:

• a structure on a substrate, the structure including a plurality of insulation layers and sacrificial layers alternatively stacked, and the structure having a hole exposing a substrate of the substrate;
• a first semiconductor pattern on the substrate in a lower portion of the hole;
• a blocking pattern, a charge storage pattern and a tunnel insulation pattern on a sidewall of the hole;
• and
• a channel structure formed on the first semiconductor pattern and the tunnel insulation pattern in the hole, the channel structure including a first portion on the first semiconductor pattern having a first thickness and a second portion on the tunnel insulation pattern having a second thickness less than the first thickness.

A vertical semiconductor device, comprising:

• a structure on a substrate, the structure including a plurality of insulation layers and sacrificial layers alternatively stacked, and the structure having a hole exposing a substrate of the substrate;
• a semiconductor pattern on the substrate in a lower portion of the hole;
• a blocking pattern, a charge storage pattern and a tunnel insulation pattern on a sidewall of the hole;
• and
• a channel structure formed on the semiconductor pattern and the tunnel insulation pattern in the hole, the channel structure including a first portion on the semiconductor pattern and a second portion on the tunnel insulation pattern,
• wherein the first portion includes silicon and polysilicon, and the second portion includes polysilicon.