Esd protection circuit

A circuit, comprising:

• a first node, a second node, and central connection node;
• a first diode having an first anode coupled to the first node and a first cathode coupled to the central connection node, the first cathode being a material other than epitaxial silicon;
• a second diode having a second anode coupled to the second node and a second cathode coupled to the central connection node, the second cathode being a material other than epitaxial silicon;
• a third diode having cathode coupled to the first node and an anode coupled to an anode of a first avalanche diode, a cathode of the first avalanche diode coupled to the central connection node;
• and
• a fourth diode having cathode coupled to the second node and an anode coupled to an anode of a second avalanche diode, a cathode of the second avalanche diode coupled to the central connection node.

A method comprising:

• forming a first cavity and a second cavity in an upper surface of a semiconductor substrate;
• forming first and second epitaxial silicon regions in the first and second cavities, respectively, each of the first and second epitaxial regions having an upper surface;
• forming first and second doped silicon regions in the upper surfaces of the first and second epitaxial silicon regions, respectively, each of the first and second doped silicon regions having an upper surface;
• forming an epitaxial layer on the upper surface of the semiconductor substrate and on the upper surfaces of the epitaxial regions and doped silicon regions, the epitaxial layer having an upper surface;
• forming first and second doped silicon regions in the upper surface of the epitaxial layer over the first and second epitaxial regions, respectively;
• and
• forming, in the upper surface of a portion of the epitaxial layer over a portion of the substrate between the first and second cavities, third and fourth doped silicon regions.