Semiconductor chip and semiconductor package including the same

A semiconductor package, comprising:

• a package substrate;
• a first semiconductor chip on the package substrate;
• and
• a second semiconductor chip on the first semiconductor chip,
• wherein the first semiconductor chip comprises:
• a chip substrate comprising a first surface and a second surface opposite to the first surface;
• a plurality of first chip pads between the package substrate and the chip substrate, and the first chip pads electrically connecting a plurality of integrated circuits of the first semiconductor chip to the package substrate;
• a plurality of second chip pads disposed on the second surface and between the second semiconductor chip and the second surface;
• a plurality of redistribution lines on the second surface, the redistribution lines electrically connected to the second semiconductor chip;
• and
• a plurality of bonding wires electrically connecting the redistribution lines to the package substrate.

A semiconductor device, comprising:

• a package substrate;
• a first semiconductor chip on the package substrate;
• and
• a second semiconductor chip disposed on and electrically connected to the first semiconductor chip,
• wherein the first semiconductor chip comprises:
• a chip substrate including a first surface and a second surface opposite to the first surface;
• an integrated circuit region including a plurality of integrated circuits adjacent to the first surface of the chip substrate;
• a plurality of first chip pads at the first surface of the chip substrate, the first chip pads electrically connected to the integrated circuits;
• and
• a plurality of redistribution lines on the second surface of the chip substrate, the redistribution lines electrically connected to the package substrate through connection members,
• wherein the redistribution lines are spaced apart from the integrated circuit region.