Connection wiring
AssigneeSharp Kabushiki Kaisha
InventorsSEIJI MURAOKA, YUKIO SHIMIZU, MOTOJI SHIOTA
Life of this patent
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AssigneeSharp Kabushiki Kaisha
InventorsSEIJI MURAOKA, YUKIO SHIMIZU, MOTOJI SHIOTA
Estimating the term…
Provided is connection wiring capable of inhibiting connection defects between bumps and pads at the time of semiconductor chip mounting and also allowing an increase in the number of pads. In an area between a pad row in any stage and a pad row in an adjacent stage, a first line 31 is disposed so as to pass under an adjacent second line 32, or a second line 32 is disposed so as to pass over an adjacent first line 31. In this case, three lines are disposed in any area between pads 20 in each stage such that the three lines include a first line 31 situated in the middle, and second lines 32 are situated so as to have the first line 31 positioned therebetween. Thus, the pitch between the pads 20 can be further reduced without reducing the width of the pads 20.
A connection wiring comprising:
Dependencies are inferred from the claim text.