Non-roughened cu trace with anchoring to reduce insertion loss of high speed io routing in package substrate

A method of forming a semiconductor package, comprising:

• disposing a conductive layer on a substrate, wherein the conductive layer has a trace;
• disposing a dielectric on the trace;
• patterning the dielectric to form one or more openings through the dielectric, wherein the dielectric remains over a plurality of first portions on the trace, and wherein the one or more openings on the dielectric expose one or more second portions on the trace;
• disposing a chemical treatment on the dielectric, the conductive layer, and the trace, wherein the chemical treatment is disposed on the one or more second portions on the trace through the one or more exposed openings on the dielectric, and wherein the chemical treatment is disposed on the one or more second portions on the trace to form one or more adhesion anchoring points on the trace;
• and
• removing the dielectric to expose the plurality of first portions on the trace, wherein one of the adhesion anchoring points is between two of the first portions on the trace, and wherein a surface roughness of an adhesion anchoring point on the trace is greater than a surface roughness of a first portion on the trace.

A semiconductor package, comprising:

• an interposer on a substrate;
• a die on the interposer;
• a conductive layer on the substrate;
• and
• a trace on the conductive layer, wherein the trace has one or more adhesion anchoring points and a plurality of portions, wherein one of the adhesion anchoring points is disposed between two of the portions, and wherein a surface roughness of an adhesion anchoring point is greater than a surface roughness of a portion.