Flat No-Lead Packages with Electroplated Edges
AssigneeTexas Instruments Incorporated
InventorsReynaldo Corpuz Javier, Alok Kumar Lohia, Andy Quang Tran
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Abstract
A lead frame sheet of flat no-lead lead frames having a semiconductor die on a die pad, terminals, and plastic encapsulation except on a back side of the sheet to provide an exposed thermal die pad, exposed side walls, and exposed back sides of the terminals. A solder wetable metal or metal alloy plating layer is on the back side and on the exposed the walls of the terminals. The exposed thermal pad and the back side of the terminals each include a contact region which lacks the plating layer.
Claims5
A packaged semiconductor flat no-lead device (packaged semiconductor device), comprising:
- a flat no-lead lead frame having a semiconductor die including bond pads thereon mounted on a die pad of said lead frame with bond wires between said bond pads and terminals of said lead frame, and plastic encapsulation except on a back side of said lead frame to expose said die pad to provide an exposed thermal die pad and to expose a back side of said terminals and side walls of said terminals;
- a stack of plating layers on said back side and on said exposed side walls of said terminals, said stack of plating layers includes nickel, palladium, and gold;
- wherein said exposed thermal pad and said back side of said terminals each include a contact region which lacks said stack of plating layers.
Dependencies are inferred from the claim text.