US 2019/0295636 A1 · APPARATUSES INCLUDING MULTI-LEVEL MEMORY CELLS AND METHODS OF OPERATION OF SAME

Abstract

Disclosed herein is a memory cell including a memory element and a selector device. Data may be stored in both the memory element and selector device. The memory cell may be programmed by applying write pulses having different polarities and magnitudes. Different polarities of the write pulses may program different logic states into the selector device. Different magnitudes of the write pulses may program different logic states into the memory element. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities and magnitudes of the write pulses.

Claims23

Dependent claims

An apparatus, comprising:

a memory cell including:
a memory element;
and
a selector device electrically coupled to the memory element;
a first memory access line coupled to the memory cell;
a second memory access line coupled to the memory cell;
a first access line driver coupled to the first memory access line;
and
a second access line driver coupled to the second memory access line,
wherein the first and second access line drivers are configured to:
provide a first voltage at a first polarity across the memory cell to write a first logic state to the memory cell,
provide a second voltage at a second polarity across the memory cell to write a second logic state to the memory cell,
provide a third voltage at the first polarity across the memory cell to write a third logic state to the memory cell, and
provide a fourth voltage at the second polarity across the memory cell to write a fourth logic state to the memory cell.

11 more elements

Dependencies are inferred from the claim text.

Apparatuses including multi-level memory cells and methods of operation of same

Life of this patent

Apparatuses including multi-level memory cells and methods of operation of same

Life of this patent

Abstract

Claims23