Circuit design support apparatus and circuit design support method
AssigneesKabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
InventorSachio HAYASHI
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Abstract
According to one embodiment, a circuit design support apparatus includes: a first specifying unit that specifies a first element generating negative potential; a second specifying unit that specifies a criterion of a current flowing to a substrate from an electrode of a second element arranged in a peripheral area of the first element due to a parasitic element; a calculation unit that calculates a criterion violation rate under a condition where a location of the second element has been shifted to one of a plurality of places; and a display processing unit that displays, on a display, information indicating the criterion violation rate such that the information is superimposed on a layout.
Claims10
A circuit design support apparatus comprising:
- a first specifying unit that specifies at least one first element by a circuit simulation, the first element being arranged on a substrate and being configured to generate negative potential lower than ground potential;
- a second specifying unit that specifies, by a circuit simulation, an amount of current of a noise current source that prevents at least one second element from meeting signal specifications, the second element being arranged in a peripheral area of the first element on the substrate, the amount of current of the noise current source being specified as a criterion of a current flowing from an electrode of the second element to the substrate due to a parasitic element formed between the first element and the second element, and the noise current source being connected to the electrode of the second element;
- a calculation unit that
- under a condition where a location of the second element has been shifted to one of a plurality of places, calculates a second element current flowing to the substrate from the electrode of the second element whose location has been shifted, and
- calculates a criterion violation rate for each of the plurality of places, the criterion violation rate being represented by a percentage of a difference between the criterion specified for the second element whose location has been shifted and the calculated second element current in relation to the criterion;
- and
- a display processing unit that displays, on a display, information indicating the calculated criterion violation rate such that the information is superimposed on a layout showing a positional relationship between the first element and the second element whose location has been shifted.
A circuit design support method implemented by a computer, the method comprising:
- specifying at least one first element by a circuit simulation, the first element being arranged on a substrate and being configured to generate negative potential lower than ground potential;
- specifying, by a circuit simulation, an amount of current of a noise current source that prevents at least one second element from meeting signal specifications, the second element being arranged in a peripheral area of the first element on the substrate, the amount of current of the noise current source being specified as a criterion of a current flowing from an electrode of the second element to the substrate due to a parasitic element formed between the first element and the second element, and the noise current source being connected to the electrode of the second element;
- under a condition where a location of the second element has been shifted to one of a plurality of places, calculating a second element current flowing to the substrate from the electrode of the second element whose location has been shifted;
- calculating a criterion violation rate for each of the plurality of places, the criterion violation rate being represented by a percentage of a difference between the criterion specified for the second element whose location has been shifted and the calculated second element current in relation to the criterion;
- and
- displaying, on a display, information indicating the calculated criterion violation rate such that the information is superimposed on a layout showing a positional relationship between the first element and the second element whose location has been shifted.
Dependencies are inferred from the claim text.