Model-building method for building top interface logic model
AssigneesGlobal Unichip Corporation, Taiwan Semiconductor Manufacturing Company, Ltd.
InventorsMeng-Hsiu TSAI, Hsin-Hsiung LIAO, Min-Hsiu TSAI
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AssigneesGlobal Unichip Corporation, Taiwan Semiconductor Manufacturing Company, Ltd.
InventorsMeng-Hsiu TSAI, Hsin-Hsiung LIAO, Min-Hsiu TSAI
Estimating the term…
A model-building method comprises following operations: reading a top netlist and a block model, wherein the top netlist comprises a first input node, a first output node and a multivibrator, the block model comprises a input node and a output node; obtaining a first subnetlist from the top netlist, wherein the first subnetlist comprises a component coupled between the input node and the first input node or the multivibrator; obtaining a second subnetlist from the top netlist, wherein the second subnetlist comprises a component coupled between the output node and the first output node or the multivibrator; obtaining a third subnetlist from the top netlist, wherein the third subnetlist comprises a component coupled between a clock input node of the multivibrator and a top clock input node of the top netlist; generating a top ILM according to the first to the third subnetlist.
A model-building method, comprising
Dependencies are inferred from the claim text.