Method for accessing flash memory module and associated flash memory controller and electronic device
AssigneeSilicon Motion, Inc.
InventorTsung-Chieh Yang
Life of this patent
Estimating the term…
Abstract
The present invention provides a method for accessing a flash memory module, wherein the method comprises: receiving data and a corresponding metadata from a host device; performing a CRC operation upon the data to generate a CRC code; encoding the metadata and the CRC code to generate an adjusted parity code; encoding the data and the adjusted parity code to generate encoded data, wherein the encoded data comprises the data, the adjusted parity code and an error correction code corresponding to the data and the adjusted parity code; and writing the encoded data and the metadata to a page of a block of a flash memory module.
Claims20
A method for accessing a flash memory module, comprising:
- receiving a data and a corresponding metadata from a host device;
- performing a cyclic redundancy check (CRC) operation upon the data to generate a CRC code;
- encoding the metadata and the CRC code to generate an adjusted parity code;
- encoding the data and the adjusted parity code to generate encoded data, wherein the encoded data comprises the data, the adjusted parity code and an error correction code corresponding to the data and the adjusted parity code;
- and
- writing the encoded data and the metadata to a page of a block of the flash memory module.
A flash memory controller, wherein the flash memory controller is utilized to access a flash memory module, and the flash memory controller comprises:
- a read-only memory (ROM), for storing a code;
- a microprocessor, for executing the code to control access to the flash memory module;
- and
- a plurality of codecs;
- wherein when the flash memory controller receives a data and a corresponding metadata from a host device, the plurality of codecs perform a CRC operation upon the data to generate a CRC code, and encodes the metadata and the CRC code to generate an adjusted parity code, and encodes the data and the adjusted parity code to generate encoded data, wherein the encoded data comprises the data, the adjusted parity code and an error correction code corresponding to the data and the adjusted parity code;
- and the microprocessor writes the encoded data and the metadata to a page of a block of the flash memory module.
An electronic device comprises:
- a flash memory module;
- and
- a flash memory controller, for accessing the flash memory module;
- wherein when the flash memory controller receives a data and a corresponding metadata from a host device, the flash memory controller performs a CRC operation upon the data to generate a CRC code, and encodes the metadata and the CRC code to generate an adjusted parity code, and encodes the data and the adjusted parity code to generate encoded data, wherein the encoded data comprises the data, the adjusted parity code and an error correction code corresponding to the data and the adjusted parity code;
- and the microprocessor writes the encoded data and the metadata to a page of a block of the flash memory module.
Dependencies are inferred from the claim text.