Memory array and measuring and testing methods for inter-hamming differences of memory array
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShih-Lien Linus LU, Kun-Hsi LI, Saman M. I. ADHAM
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Abstract
A memory device is provided. The memory device includes a memory array including a plurality of sections, and an inter-hamming difference analyzer. Each of the sections has an individual location in the memory array. The inter-hamming difference analyzer is configured to obtain a plurality of inter-hamming differences according to the number of unlike bits between content of each section of the plurality of sections corresponding to a first operating condition and content of another section of the plurality of sections corresponding to a second operating condition.
Claims20
A memory device, comprising:
- a memory array comprising a plurality of sections, wherein each of the sections has an individual location in the memory array;
- and
- an inter-hamming difference analyzer configured to obtain a plurality of inter-hamming differences according to the number of unlike bits between content of each section of the plurality of sections corresponding to a first operating condition and content of another section of the plurality of sections corresponding to a second operating condition.
A method for measuring inter-hamming difference of a memory array divided into a plurality of sections, comprising:
- obtaining a plurality of first contents of the plurality of sections from the memory array when the memory array is operating in a first operating condition;
- obtaining a plurality of second contents of the plurality of sections from the memory array when the memory array is operating in a second operating condition that is different from the first operating condition;
- obtaining a plurality of inter-hamming differences between the first and second contents, wherein the inter-hamming difference represents the number of unlike bits between the first content of one section of the plurality of sections and the second content of another section of the plurality of sections;
- and
- obtaining a maximum inter-hamming difference and a minimum inter-hamming difference among the inter-hamming differences.
A method for testing a memory array divided into a plurality of sections, comprising:
- applying a first operating condition to the memory array, and obtaining a plurality of first contents of the plurality of sections from the memory array operating in the first operating condition;
- applying a second operating condition to the memory array, and obtaining a plurality of second contents of the plurality of sections from the memory array operating in the second operating condition;
- obtaining a test result of the memory array according to a maximum inter-hamming difference and a minimum inter-hamming difference among a plurality of inter-hamming differences,
- wherein each of the inter-hamming differences represents the number of unlike bits between the first content of one section of the plurality of sections and the second content of another section of the plurality of sections.
Dependencies are inferred from the claim text.