Method of implementing error correction code used by memory storage apparatus and memory storage apparatus using the same

A memory storage apparatus comprising:

• a connection interface;
• a memory array;
• and
• a memory control circuit which comprises an ECC encoder and is coupled to the connection interface and the memory array, wherein the memory control circuit is configured for:
• receiving, through the connection interface, a write command comprising a write address and a write data;
• reading an existing codeword comprising a predetermined bit sequence;
• encoding the write data into a new codeword based on a default ECC;
• flipping at least one bit of the new codeword based on a number of bits required to be changed from the existing codeword to the new codeword;
• and
• writing the new codeword into the memory array, wherein in response to every message bit of the new codeword to be flipped once, either an average or a maximum number of parity bits flips of the new codeword is minimized according to a modified ECC which is based on the default ECC.