Memory system

A memory system comprising:

• a semiconductor memory including a memory cell array, the memory cell array including a first memory cell and a second memory cell configured to hold data and coupled respectively to a first word line and a second word line;
• and
• a controller configured to control the semiconductor memory,
• wherein the memory system is capable of executing a first operation and a second operation after the first operation,
• in the first operation, the controller issues a first command sequence and, in response to the first command sequence, the semiconductor memory applies a first voltage to the first word line and applies a second voltage to the second word line to read data from the first memory cell, and the read data is transmitted from the semiconductor memory to the controller,
• in the second operation, the controller issues a second command sequence and, in response to the second command sequence, the semiconductor memory applies a third voltage to the first word line and applies a fourth voltage to the second word line, and data held in the memory cell array is left untransmitted to the controller,
• the second operation is executed after the first operation without intervention of a write operation and erase operation on the first memory cell,
• the third voltage turns on the first memory cell regardless of data held in the first memory cell, and
• the second voltage and the fourth voltage turn on the second memory cell regardless of data held in the second memory cell.