Optimization of memory refresh rates using estimation of die temperature
AssigneeToshiba Memory Corporation
InventorJason Griffin
Life of this patent
Estimating the term…
Abstract
A memory system includes a memory in which stored data is periodically rewritten by a refresh command, and a memory controller. The memory has an input/output (“I/O”) terminal, and the memory controller is communicatively coupled by a channel to the I/O terminal. The memory transmits a plurality of commands over the channel to the memory. The memory controller estimates a first total energy consumed based on the plurality of commands during a first sampling period, determines a temperature of the memory based on the first total energy consumed in the first sampling period, determines a first refresh cycle rate corresponding to the first temperature of the memory and transmits a refresh command to the memory based on the first refresh cycle rate.
Claims21
(canceled)
A memory comprising:
- a memory array configured to rewrite stored data according to a refresh cycle;
- and
- a memory controller communicatively coupled to the memory array, and configured to:
- determine a number of commands transmitted to the memory array during a given period,
- estimate a total energy to be consumed by the memory based on the number,
- determine a refresh cycle rate based on the estimated total energy to be consumed, and
- transmit a refresh command to the memory at the determined refresh cycle rate.
A method of determining a refresh rate for a memory, the method comprising:
- storing, at a memory controller, a number of commands transmitted to a memory array within a given period;
- estimating, at the memory controller, a total energy to be consumed by the memory based on the number of commands;
- determining, at the memory controller, a refresh cycle rate based on the estimated total energy to be consumed;
- and
- transmitting a refresh command to the memory array at the determined refresh cycle rate.
Dependencies are inferred from the claim text.