System and method for performing lithography process in semiconductor device fabrication

A method for semiconductor device fabrication, comprising:

• providing a metrology tool embedded in a lithography tool;
• using the metrology tool to determine a plurality of topographical heights, wherein the using the metrology tool is a detector of air discharged onto a target surface;
• using a process parameter control module operable to generate a wafer map from the plurality of topographical heights, wherein the generating the wafer map includes:
• determining a comparison of each of the plurality of topographical heights with a predicted topographical height based on design data;
• sending the wafer map to the lithography tool operable to receive the wafer map;
• and
• performing an exposure process on the target surface using the lithography tool according to the wafer map, wherein the performing the exposure process includes exposing a first coordinate on the target surface to determine a first topographical height of the plurality of topographical heights and using the metrology tool to determine a second topographical height of the plurality of topographical heights, the first topographical height of a second coordinate on the target surface and the second topographical height of a third coordinate on the target surface.

A system for semiconductor device fabrication, comprising:

• a metrology tool operable to determine a plurality of topographical heights, wherein the metrology tool using a detector of air discharged onto a target surface;
• a process parameter control module operable to generate a wafer map using the plurality of topographical heights;
• and
• a lithography tool operable to receive the wafer map and perform an exposure process according to the wafer map.