# US 2019/0246383 A1 · Transmitting device, receiving device, transmitting method, and receiving method

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- Number: US 2019/0246383 A1
- Document ID: US20190246383A1
- Status: Published application
- Kind: A1
- Application number: 16/385,998
- Filed: 2019-04-16
- Published: 2019-08-08
- Earliest claimed: 2012-01-19
- Assignees: Sun Patent Trust
- Applicants: Sun Patent Trust
- Inventors: Ayako Horiuchi; Akihiko Nishio
- Web page: https://patentgrep.com/patent/US20190246383A1

## CPC

- H04W 72/23: in the downlink direction of a wireless link, i.e. towards a terminal
- H04L 5/0023: {Time-frequency-space}
- H04L 5/0048: {Allocation of pilot signals, i.e. of signals known to the receiver (allocation of control signalling H04L5/0053; use of control signalling H04L5/0091)}
- H04L 5/0053: {Allocation of signalling, i.e. of overhead other than pilot signals}
- H04W 72/20: Control channels or signalling for resource management
- H04L 1/0057: {Block codes (H04L1/0061, H04L1/0064 take precedence)}
- H04W 72/1268: of uplink data flows
- H04W: WIRELESS COMMUNICATION NETWORKS (broadcast communication H04H; communication systems using wireless links for non-selective communication, e.g. wireless extensions H04M1/72)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

In a transmitting device, each of the plurality of mapping candidates that make up the search space is configured from the same number of control channel elements as an aggregation level value, the control channel elements are obtained by dividing each physical resource block into a predetermined number, and the quantity of resource elements contained in each of the predetermined number of control channel elements in each physical resource block adopts at least two types of values. A search space setting unit sets a search space of which the aggregation level value is 2 or more so that, between a plurality of mapping candidates, variation in the total quantity of resource elements contained in the control channel elements that make up the mapping candidates is as small as possible.

## Claims

### Claim 1

An integrated circuit comprising:
circuitry, which, in operation, controls
receiving a control signal transmitted on an Enhanced Physical Downlink Control Channel (EPDCCH) from a base station apparatus, the control signal being mapped to one of a plurality of search spaces in the EPDCCH;
identifying the one of the plurality of search spaces to which the control signal is mapped, wherein when a CCE aggregation level is one, the plurality of search spaces include a first CCE, which includes a first number of resource elements (REs), and a second CCE, which includes a second number of REs different from the first number of REs; and
decoding the identified search space and acquiring the control signal that is mapped to the identified search space.

### Claim 2 (depends on 1)

The integrated circuit according to claim 1, wherein the plurality of search spaces are configured for a communication apparatus.

### Claim 3 (depends on 1)

The integrated circuit according to claim 1, wherein the first CCE belongs to a first Resource Block (RB) pair and the second CCE belongs to a second Resource Block (RB) pair which is different from the first RB pair.

### Claim 4 (depends on 1)

The integrated circuit according to claim 1, wherein the control signal indicates downlink assignment and uplink grant.

### Claim 5 (depends on 1)

The integrated circuit according to claim 1, wherein the first CCE and the second CCE are allocated on the EPDCCH by either of a localized allocation or a distributed allocation.

### Claim 6 (depends on 1)

The integrated circuit according to claim 1, wherein each of a plurality of Resource Block (RB) pairs includes four CCEs, and the four CCEs include the first CCE including the first number of REs and the second CCE including the second number of REs.

### Claim 7 (depends on 1)

The integrated circuit according to claim 1, wherein each of the plurality of search spaces includes a plurality of mapping candidates that are sized according to the CCE aggregation level and, when the CCE aggregation level is one, each of the plurality of search spaces includes a first mapping candidate comprised of the first CCE including the first number of REs and a second mapping candidate comprised of the second CCE including the second number of REs.

### Claim 8 (depends on 1)

The integrated circuit according to claim 1, wherein each of the plurality of search spaces includes a plurality of mapping candidates that are sized according to the CCE aggregation level and, when the CCE aggregation level is two, each of the plurality of search spaces includes at least one mapping candidate, which is comprised of the first CCE including the first number of REs and the second CCE including the second number of REs.

### Claim 9 (depends on 1)

The integrated circuit according to claim 1, comprising:
at least one input coupled to the circuitry, wherein the at least one input, in operation, inputs data; and
at least one output coupled to the circuitry, wherein the at least one output, in operation, outputs data.
