# US 2019/0245488 A1 · Resistorless power amplifier > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0245488 A1 - Document ID: US20190245488A1 - Status: Published application - Kind: A1 - Application number: 15/887,635 - Filed: 2018-02-02 - Published: 2019-08-08 - Earliest claimed: 2018-02-02 - Assignees: Advanced Semiconductor Engineering, Inc. - Applicants: Advanced Semiconductor Engineering, Inc. - Inventors: Jaw-Ming DING - Web page: https://patentgrep.com/patent/US20190245488A1 ## CPC - H03F 1/0205: {in transistor amplifiers} - H03F 3/19: with semiconductor devices only - H03F 3/21: with semiconductor devices only {(H03F3/245 takes precedence)} - H03F 2200/451: the amplifier being a radio frequency amplifier - H04B 1/04: Circuits - H03F: AMPLIFIERS - H04B: TRANSMISSION ## Abstract The present disclosure relates to a power amplifier circuit including a current source, a power control circuit, a current mirror and an output circuit. The current source circuit includes a first transistor and a second transistor. A source of the first transistor is connected to a drain of the second transistor and a gate of the first transistor is connected to a source with the second transistor. The power control circuit is connected to a gate of the second transistor. The current mirror circuit is connected to the gate of the first transistor and a source of the second transistor. The output circuit is connected to the current mirror circuit. ## Claims ### Claim 1 A power amplifier circuit comprising: a current source circuit comprising a first transistor and a second transistor, a source of the first transistor connected to a drain of the second transistor and a gate of the first transistor connected to a source of the second transistor; a power control circuit connected to a gate of the second transistor; a current mirror circuit connected to the gate of the first transistor and the source of the second transistor; and an output circuit connected to the current mirror circuit. ### Claim 2 (depends on 1) The power amplifier circuit of claim 1, wherein the power control circuit is configured to receive a first voltage input and to control a current of the output circuit based on the first voltage input. ### Claim 3 (depends on 1) The power amplifier circuit of claim 1, wherein the power control circuit comprises a third transistor, and the third transistor comprises a drain connected to a first voltage input, a gate connected to ground and a source connected to the gate of the second transistor. ### Claim 4 (depends on 3) The power amplifier circuit of claim 3, wherein the power control circuit further comprises a fourth transistor between the third transistor and the first voltage input, and the fourth transistor comprises a drain connected to the first voltage input, a gate connected to ground and a source connected to the drain of the third transistor. ### Claim 5 (depends on 1) The power amplifier circuit of claim 1, wherein the current source circuit further comprises a third transistor and a fourth transistor, and the third transistor comprises a source connected to a drain of the first transistor, a gate connected to the source of the first transistor and a drain connected to a first voltage input. ### Claim 6 (depends on 1) The power amplifier circuit of claim 1, further comprising an enable circuit, wherein the enable circuit comprises a third transistor and a fourth transistor; a drain of the third transistor is connected to a first voltage input, a gate of the third transistor is connected to the current mirror circuit, and a source of the third transistor is connected to a gate of the fourth transistor; and a source of the fourth transistor is connected to the current mirror circuit and a drain of the fourth transistor is connected to the gate of the first transistor. ### Claim 7 (depends on 6) The power amplifier circuit of claim 6, further comprising a fifth transistor, wherein the fifth transistor comprises a drain connected to a second voltage input, a gate connected to the gate of the first transistor and a source connected to the drain of the fourth transistor. ### Claim 8 (depends on 6) The power amplifier circuit of claim 6, wherein the current mirror circuit further comprises a fifth transistor and a sixth transistor; a collector of the fifth transistor is connected to the source of the second transistor, a base of the fifth transistor is connected to an emitter of the sixth transistor, and an emitter of the fifth transistor is connected to the output circuit; and the emitter of the sixth transistor is connected to the output circuit, a base of the sixth transistor is connected to the source of the fourth transistor and a collector of the sixth transistor is connected to a second voltage input. ### Claim 9 (depends on 8) The power amplifier circuit of claim 8, wherein the current mirror circuit further comprises a seventh transistor, an eighth transistor, a ninth transistor and a tenth transistor; a drain of the seventh transistor is connected to the emitter of the sixth transistor, a gate of the seventh transistor is connected to the base of the fifth transistor and a source of the seventh transistor is connected to a drain of the eighth transistor; a gate of the eighth transistor is connected to the base of the fifth transistor and a source of the eighth transistor is connected to a drain of the ninth transistor; a gate and a source of the ninth transistor are connected to the base of the fifth transistor; and a gate of the tenth transistor is connected to the base of the fifth transistor, a drain of the tenth transistor is connected to the emitter of the sixth transistor and a source of the tenth transistor is connected to the output circuit. ### Claim 10 A power amplifier circuit comprising: a current source circuit; a power control circuit comprising a first transistor and a second transistor, the first transistor comprising a drain connected to a first voltage input, a gate connected to ground and a source connected to a gate of the second transistor; a current mirror circuit comprising a first node connected to the current source circuit and a second node connected to a source of the second transistor; and an output circuit connected to the current mirror circuit. ### Claim 11 (depends on 10) The power amplifier circuit of claim 10, wherein the output circuit is configured to adjust an output current based on the first voltage input. ### Claim 12 (depends on 10) The power amplifier circuit of claim 10, wherein the current source circuit comprises a third transistor, a fourth transistor, a fifth transistor and a sixth transistor; a drain of the third transistor is connected to a second voltage input, a gate of the third transistor is connected to a source of the fourth transistor and a source of the third transistor is connected to a drain of the fourth transistor; a gate of the fourth transistor is connected to the first node of the current mirror circuit; a drain of the fifth transistor is connected to the source of the fourth transistor, a gate of the fifth transistor is connected to the gate of the fourth transistor and a source of the fifth transistor is connected to a drain of the sixth transistor; and a gate and a source of the sixth transistor are connected to the gate of the fourth transistor. ### Claim 13 (depends on 12) The power amplifier circuit of claim 12, further comprising a seventh transistor and a eighth transistor, wherein a gate of the seventh transistor is connected to the source of the third transistor, a drain of the seventh transistor is connected to the second voltage input and a source of the seventh transistor is connected to a base of the eighth transistor; and a collector of the eighth transistor is connected to the second voltage input and an emitter of the eight transistor is connected to a drain of the second transistor. ### Claim 14 (depends on 10) The power amplifier circuit of claim 10, wherein the current mirror circuit comprises a third transistor, a fourth transistor, a fifth transistor and a sixth transistor; a collector of the third transistor is connected to the current source circuit, a base of the third transistor is connected to a gate of the sixth transistor and an emitter of the third transistor is connected to the output circuit; a source of the fourth transistor is connected to the output circuit, a gate of the fourth transistor is connected to the gate of the sixth transistor and a drain of the fourth transistor is connected to the source of the second transistor; and a drain of the fifth transistor is connected to the source of the second transistor, a gate of the fifth transistor is connected to the gate of the sixth transistor and a source of the fifth transistor is connected to a drain of the sixth transistor. ### Claim 15 A power amplifier circuit comprising: a current source circuit configured to generate a first current; a current mirror circuit connected to the current source circuit and configured to generate a second current in response to the first current; a power control circuit connected to the current source circuit and the current mirror circuit and configured to receive a first voltage; and an output circuit connected to the current mirror circuit and configured to generate a third current, wherein the third current varies in response to the first voltage. ### Claim 16 (depends on 15) The power amplifier circuit of claim 15, wherein the third current increases from 0 mA to 45 mA when the first voltage increases from 0 V to 2 V. ### Claim 17 (depends on 15) The power amplifier circuit of claim 15, wherein the third current increases from 0 mA to 41 mA when the first voltage increases from 0 V to 0.8 V. ### Claim 18 (depends on 15) The power amplifier circuit of claim 15, wherein the current source circuit comprises a first transistor and a second transistor; a source of the first transistor is connected to a drain of the second transistor, a gate of the first transistor is connected to a source of the second transistor; and a gate of the second transistor is connected to receive the first voltage. ### Claim 19 (depends on 18) The power amplifier circuit of claim 18, wherein the power control circuit comprises a third transistor, and the third transistor comprises a drain connected to receive the first voltage, a gate connected to ground and a source connected to the gate of the second transistor. ### Claim 20 (depends on 18) The power amplifier circuit of claim 18, wherein the power control circuit comprises a third transistor and a fourth transistor; a drain of the third transistor is connected to a source of the fourth transistor, a gate of the third transistor is connected to ground and a source of the third transistor is connected to the gate of the second transistor; and a drain of the fourth transistor is connected to receive the first voltage and a gate of the fourth transistor is connected to ground. ### Claim 21 (depends on 18) The power amplifier circuit of claim 18, wherein a resistance value of the second transistor varies in response to the first voltage. ### Claim 22 A wireless communication system comprising: a GaAs power amplifier comprising an input configured to receive a first signal and an output configured to output an amplified signal; and a GaN transistor comprising a source connected to the output of the power amplifier, and a gate connected to ground. ### Claim 23 (depends on 22) The wireless communication system of claim 22, further comprising an inductor, wherein a drain of the GaN transistor is connected to a power source through the inductor. ### Claim 24 (depends on 22) The wireless communication system of claim 22, wherein a drain of the GaN transistor is configured to output a second signal corresponding to the first signal. ### Claim 25 (depends on 22) The wireless communication system of claim 22, wherein the power amplifier comprises: a current source circuit comprising a first transistor and a second transistor, a source of the first transistor connected to a drain of the second transistor and a gate of the first transistor connected to a source of the second transistor; a power control circuit connected to a gate of the second transistor; a current mirror circuit connected to the gate of the first transistor and the source of the second transistor; and an output circuit connected to the current mirror circuit. ### Claim 26 (depends on 22) The wireless communication system of claim 22, wherein the power amplifier comprises: a current source circuit; a power control circuit comprising a first transistor and a second transistor, the first transistor comprising a drain connected to a first voltage input, a gate connected to ground and a source connected to a gate of the second transistor; a current mirror circuit comprising a first node connected to the current source circuit and a second node connected to a source of the second transistor; and an output circuit connected to the current mirror circuit.