# US 2019/0244979 A1 · Display device

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2019/0244979 A1
- Document ID: US20190244979A1
- Status: Published application
- Kind: A1
- Application number: 15/929,125
- Filed: 2019-04-18
- Published: 2019-08-08
- Earliest claimed: 2017-03-29
- Assignees: Japan Display Inc.
- Applicants: Japan Display Inc.
- Inventors: Isao SUZUMURA; Yohei YAMAGUCHI; Hajime WATAKABE; Akihiro HANADA; Hirokazu WATANABE; Marina SHIOKAWA
- Web page: https://patentgrep.com/patent/US20190244979A1

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes}
- H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs}
- H10D 30/6739: {Conductor-insulator-semiconductor electrodes}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 64/671: {the conductor having lateral variation in doping or structure}
- H10D 86/0214: {using temporary substrates}
- H10D 86/0221: {comprising manufacture, treatment or patterning of TFT semiconductor bodies}
- H10D 86/411: {characterised by materials, geometry or structure of the substrates}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/441: {Interconnections, e.g. scanning lines}
- H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics}
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10P 14/3434: {being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424)}
- H10P 14/69215: {the material being a silicon oxide, e.g. SiO2}
- H10P 14/69391: {the material containing aluminium, e.g. Al2O3}
- H10P 14/69433: {the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz}
- H10P 50/20: Dry etching; Plasma etching; Reactive-ion etching
- H10P 52/00: Grinding, lapping or polishing of wafers, substrates or parts of devices
- H10P 95/00: Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H10P 95/70: Chemical treatments
- G02F 1/133305: {Flexible substrates, e.g. plastics, organic film}
- G02F 1/13452: {Conductors connecting driver circuitry and terminals of panels}
- G02F 1/136227: {Through-hole connection of the pixel electrode to the active element through an insulation layer}
- G02F 1/136286: {Wiring, e.g. gate line, drain line}
- G02F 1/136295: {Materials; Compositions; Manufacture processes}
- G02F 1/1368: in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)}
- G02F 2202/10: semiconductor
- H10K 59/1213: {the pixel elements being TFTs}
- H10K 59/123: Connection of the pixel electrodes to the thin film transistors [TFT]
- H10K 59/131: Interconnections, e.g. wiring lines or terminals
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

A display device to improve reliability of the TFT of the oxide semiconductor, including: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor; a first gate insulating film is formed on the first oxide semiconductor, a gate electrode is formed on the first gate insulating film, an interlayer insulating film is formed over the gate electrode; the gate insulating film includes a first silicon oxide film, the gate electrode includes a first gate layer made of a second oxide semiconductor and a second gate layer made of metal or alloy; the interlayer insulating film has a first interlayer insulating film including a second silicon oxide film, and a second interlayer insulating film including a first aluminum oxide film on the first interlayer insulating film.

## Claims

### Claim 1

A display device comprising:
a substrate including a display area where plural pixels are formed, wherein, for each of the plural pixels:
said each of the plural pixels includes a first TFT of a first oxide semiconductor,
a gate insulating film is formed on the first oxide semiconductor,
a gate electrode is formed on the gate insulating film,
an interlayer insulating film is formed over the gate electrode,
the gate insulating film includes a first silicon oxide film,
the gate electrode includes a first gate layer made of a second oxide semiconductor and a second gate layer made of metal or alloy,
an eaves of the second gate layer is formed to the second oxide semiconductor,
a distance between a drain region and a source region of the first oxide semiconductor is wider than a width of the second oxide semiconductor in cross sectional view, and
a defect density in the first silicon oxide film is 1×1018 (spins/cm3) or less by ESR (Electron Spin resonance) analysis, and
the interlayer insulating film has a first interlayer insulating film including a second silicon oxide film, and a second interlayer insulating film including a first aluminum oxide film on the first interlayer insulating film.

### Claim 2 (depends on 1)

The display device according to claim 1,
wherein the gate insulating film is formed only under the gate electrode.

### Claim 3 (depends on 1)

The display device according to claim 1,
wherein a barrier layer, made of a metal nitride, metal oxide or silicon nitride, is formed between the gate electrode and the interlayer insulating film.

### Claim 4 (depends on 1)

The display device according to claim 1,
wherein a first through hole is formed in the first interlayer insulating film and the second interlayer insulating film to connect a drain electrode and a drain area of the first oxide semiconductor,
a second through hole is formed in the first interlayer insulating film and the second interlayer insulating film to connect a source electrode and a source area of the first oxide semiconductor, and
the drain electrode and the source electrode extend on the second interlayer insulating film.

### Claim 5 (depends on 1)

The display device according to claim 1,
wherein an undercoat, which includes a second aluminum oxide film, is formed on or above the substrate, and
the first oxide semiconductor is formed on the second aluminum oxide film or above the second aluminum oxide film.

### Claim 6 (depends on 1)

The display device according to claim 1,
wherein the first silicon oxide film has a desorption of oxygen that;
in TDS (Thermal Desorption Spectrometry) analysis, when M/z=32, the desorption of oxygen (O2) is 1×1015 (molecules/cm2) or more at the temperature of 100 to 250 centigrade.

### Claim 7 (depends on 1)

The display device according to claim 1,
wherein the first silicon oxide film has a desorption of oxygen that;
in TDS analysis, provided M/z=44, the desorption of N2O is 8×1013 (molecules/cm2) or less at the temperature of 100 to 400 centigrade.

### Claim 8

A display device comprising:
a substrate including a display area where plural pixels are formed, wherein, for each of the plural pixels:
said each of the plural pixels includes a first TFT of a first oxide semiconductor,
a first gate insulating film is formed on the first oxide semiconductor,
a first gate electrode is formed on the first gate insulating film,
an interlayer insulating film is formed over the first gate electrode,
the first gate insulating film includes a first silicon oxide film,
the first gate electrode includes a first gate layer made of a second oxide semiconductor and a second gate layer made of metal or alloy,
an eaves of the second gate layer is formed to the second oxide semiconductor,
a distance between a drain region and a source region of the first oxide semiconductor is wider than a width of the second oxide semiconductor in cross sectional view, and
a defect density in the first silicon oxide film is 1×1018 (spins/cm3) or less by ESR (Electron Spin resonance) analysis,
the interlayer insulating film has a first interlayer insulating film including a second silicon oxide film, and a second interlayer insulating film including a first aluminum oxide film on the first interlayer insulating film,
a second gate insulating film is formed under the first oxide semiconductor, and
a second gate electrode is formed under the second gate insulating film.

### Claim 9 (depends on 8)

The display device according to claim 8,
the first gate insulating film is formed only under the first gate electrode.

### Claim 10 (depends on 8)

The display device according to claim 8,
wherein an undercoat, which includes a second aluminum oxide film, is formed on the substrate, and
the second gate electrode is formed on the second aluminum oxide film.

### Claim 11 (depends on 1)

The display device according to claim 1,
wherein the substrate is made of polyimide.