# US 2019/0244906 A1 · Semiconductor packages and display devices including the same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2019/0244906 A1
- Document ID: US20190244906A1
- Status: Published application
- Kind: A1
- Application number: 16/170,804
- Filed: 2018-10-25
- Published: 2019-08-08
- Earliest claimed: 2018-02-07
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Ji Ah MIN; Ye Chung CHUNG
- Web page: https://patentgrep.com/patent/US20190244906A1

## CPC

- H10W 90/00: Package configurations
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 70/611: {for connecting multiple chips together}
- H10W 70/635: {Through-vias}
- H10W 70/65: Shapes or dispositions of interconnections
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10D 86/441: {Interconnections, e.g. scanning lines}
- H10D 86/60: wherein the TFTs are in active matrices
- H10W 72/072: {of bump connectors}
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

Semiconductor packages are provided. A semiconductor package includes a substrate including a first bonding region, a chip region, and a second bonding region. Moreover, the substrate includes first and second surfaces that are opposite to each other. The semiconductor package includes a pad group including a pad on the first surface in the chip region. The semiconductor package includes a semiconductor chip on the pad group. The semiconductor package includes a wire connecting the pad and the second bonding region. The wire includes a portion that extends along the second surface of the substrate. Related display devices are also provided.

## Claims

### Claim 1

A semiconductor package comprising:
a film substrate comprising a first bonding region, a chip region, and a second bonding region that are in a sequence in a first direction, the film substrate further comprising first and second surfaces that are opposite to each other;
a pad group comprising first, second, and third pads on the first surface in the chip region and spaced apart from each other in a second direction that intersects the first direction;
a first semiconductor chip on the pad group on the first surface;
a second semiconductor chip on the first surface in the chip region, and in a sequence in the second direction together with the first semiconductor chip, adjacent the first pad;
a first wire connecting the first pad and the second bonding region;
a second wire connecting the second pad and the first bonding region; and
a third wire connecting the third pad and the second bonding region,
wherein the first wire comprises a first via that penetrates the film substrate, a first extended portion that connects the first pad and the first via, and a second extended portion that connects the first via and the second bonding region and extends along the second surface of the film substrate.

### Claim 2 (depends on 1)

The semiconductor package of claim 1, wherein at least part of the second extended portion is overlapped by the first semiconductor chip.

### Claim 3 (depends on 1)

The semiconductor package of claim 1, further comprising:
first and second bonding pads spaced apart from each other on the first surface in the second bonding region,
wherein the first wire connects the first pad and the first bonding pad, and
wherein the third wire connects the third pad and the second bonding pad.

### Claim 4 (depends on 3)

The semiconductor package of claim 3, wherein the first wire further comprises a second via that is in the second bonding region.

### Claim 5 (depends on 3)

The semiconductor package of claim 3, wherein the second bonding pad is closer than the first bonding pad to the chip region.

### Claim 6 (depends on 1)

The semiconductor package of claim 1, wherein the first via is between the chip region and the first bonding region.

### Claim 7

(canceled)

### Claim 8 (depends on 1)

The semiconductor package of claim 1, wherein the first wire further comprises a third extended portion that connects the first pad and the first bonding region and extends along the first surface of the film substrate.

### Claim 9

(canceled)

### Claim 10

(canceled)

### Claim 11 (depends on 1)

The semiconductor package of claim 1,
wherein the third wire includes a second via that is between the chip region and the first bonding region, and
wherein at least part of the third wire extends along the second surface of the film substrate.

### Claim 12

(canceled)

### Claim 13 (depends on 1)

The semiconductor package of claim 1, further comprising:
a fourth pad on the first surface in the chip region adjacent the first pad, the fourth pad being connected to the second semiconductor chip; and
a fourth wire connecting the fourth pad and the second bonding region,
wherein the fourth wire comprises a second via that penetrates the film substrate, a third extended portion that connects the fourth pad and the second via, and a fourth extended portion that connects the second via and the second bonding region and extends along the second surface of the film substrate.

### Claim 14 (depends on 1)

The semiconductor package of claim 1, further comprising:
a fourth pad on the first surface in the chip region and closer than the pad group to the second bonding region, the fourth pad being connected to the first semiconductor chip; and
a fourth wire connecting the fourth pad and the second bonding region,
wherein at least part of the fourth wire extends along the second surface of the film substrate.

### Claim 15 (depends on 1)

The semiconductor package of claim 1, wherein the first and second semiconductor chips comprise first and second display driver integrated circuits (DDIs), respectively.

### Claim 16 (depends on 1)

The semiconductor package of claim 1,
wherein the first and third wires comprise respective output wires, and
wherein the second wire comprises an input wire.

### Claim 17

A semiconductor package comprising:
a film substrate comprising a first bonding region, a chip region, and a second bonding region that are in a sequence in a first direction, and further comprising first and second surfaces that are opposite to each other;
a first pad group comprising first and second pads that are on the first surface in the chip region and are spaced apart from each other in a second direction that intersects the first direction;
a second pad group comprising a third pad that is on the first surface in the chip region and is spaced apart in the second direction from the second pad with the first pad therebetween;
a first semiconductor chip on the first pad group;
a second semiconductor chip on the second pad group and adjacent the first semiconductor chip in the second direction;
a first wire comprising a first via that penetrates the film substrate, a first extended portion that connects the first pad and the first via, and a second extended portion that connects the first via and the second bonding region and extends along the second surface of the film substrate;
a second wire connecting the second pad and the first bonding region; and
a third wire comprising a second via that penetrates the film substrate, a third extended portion that connects the third pad and the second via, and a fourth extended portion that connects the second via and the second bonding region and extends along the second surface of the film substrate.

### Claim 18 (depends on 17)

The semiconductor package of claim 17, further comprising:
a fourth wire extending along the first surface of the film substrate,
wherein the first pad group further comprises a fourth pad that is spaced apart from the first pad with the second pad therebetween, and
wherein the fourth wire connects the fourth pad and the second bonding region.

### Claim 19 (depends on 17)

The semiconductor package of claim 17, further comprising:
a fourth wire extending along the first surface of the film substrate,
wherein the second pad group further comprises a fourth pad that is spaced apart from the first pad with the third pad therebetween, and
wherein the fourth wire connects the fourth pad and the first bonding region.

### Claim 20 (depends on 17)

The semiconductor package of claim 17, wherein a distance in the second direction between the first and second semiconductor chips is 100 micrometers (μm) or shorter.

### Claim at position 21

-23.

### Claim 24

A semiconductor package comprising:
a substrate comprising a first bonding region, a second bonding region, and a chip region that is between the first and second bonding regions in a first direction, the substrate further comprising first and second surfaces that are opposite to each other;
a pad group comprising first and second pads that are on the first surface in the chip region and are spaced apart from each other in a second direction that intersects the first direction, wherein the pad group is adjacent the first bonding region;
a first semiconductor chip on the pad group on the first surface;
a second semiconductor chip on the first surface in the chip region, adjacent the first semiconductor chip in the second direction, and closer to the first pad than to the second pad;
a first wire connecting the first pad and the second bonding region; and
a second wire connecting the second pad and the second bonding region and extending along the first surface of the substrate,
wherein the first wire comprises a first via that penetrates the substrate, a first extended portion that connects the first pad and the first via, and a second extended portion that connects the first via and the second bonding region and extends along the second surface of the substrate.

### Claim 25 (depends on 24)

The semiconductor package of claim 24, further comprising:
a third wire extending along the first surface of the substrate,
wherein the pad group further comprises a third pad that is between the first and second pads, and
wherein the third wire connects the third pad and the first bonding region.

### Claim 26 (depends on 24)

The semiconductor package of claim 24, further comprising:
a third wire between the first and second semiconductor chips,
wherein the pad group further comprises a third pad that is closer than the first pad to the second semiconductor chip, and
wherein the third wire connects the third pad and the second bonding region.

### Claim 27 (depends on 24)

The semiconductor package of claim 24, further comprising:
a direct wire extending on the first surface of the substrate to connect the first and second bonding regions.

### Claim at position 26

-32. (canceled)