# US 2019/0244580 A1 · Method of driving a liquid crystal display panel and liquid crystal display device employing the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2019/0244580 A1 - Document ID: US20190244580A1 - Status: Published application - Kind: A1 - Application number: 16/263,257 - Filed: 2019-01-31 - Published: 2019-08-08 - Earliest claimed: 2018-02-06 - Assignees: Samsung Display Co., Ltd. - Applicants: Samsung Display Co., Ltd. - Inventors: Sangan KWON; Junpyo LEE; Kyunho KIM; Sungjin KIM; Yong-Jin SHIN; Neung-Beom LEE; Kyung-Hwa LIM; Jinhyuk JANG - Web page: https://patentgrep.com/patent/US20190244580A1 ## CPC - G09G 3/3655: {Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors} - G09G 3/3696: {Generation of voltages supplied to electrode drivers} - G02F 1/136213: {Storage capacitors associated with the pixel electrode} - G02F 1/1368: in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} - G09G 3/3406: {Control of illumination source (illumination devices structurally associated with liquid crystal cells G02F1/1336)} - G09G 3/3677: {suitable for active matrices only} - G09G 3/3688: {suitable for active matrices only} - G02F 2201/121: common or background - G02F 2201/123: pixel - G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2320/045: Compensation of drifts in the characteristics of light emitting or modulating elements - G09G 2320/048: using evaluation of the usage time - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS ## Abstract A method of driving a liquid crystal display panel is provided. The liquid crystal display panel includes: a liquid crystal display pixel including a liquid crystal structure including a pixel electrode, a liquid crystal layer, and a common electrode; a switching transistor connected between the pixel electrode of the liquid crystal structure and a data-line; and a storage capacitor connected to the pixel electrode of the liquid crystal structure. The method includes: calculating an accumulated driving time of the liquid crystal display panel by accumulating a driving time of the liquid crystal display panel; determining whether or not the accumulated driving time has reached a deterioration reference time; and when the accumulated driving time is determined to have reached the deterioration reference time, changing a gate-off voltage applied to a gate terminal of the switching transistor and a common voltage applied to the common electrode. ## Claims ### Claim 1 A method of driving a liquid crystal display panel, the liquid crystal display panel comprising: a liquid crystal display pixel comprising a liquid crystal structure comprising a pixel electrode, a liquid crystal layer, and a common electrode; a switching transistor connected between the pixel electrode of the liquid crystal structure and a data-line; and a storage capacitor connected to the pixel electrode of the liquid crystal structure, the method comprising: calculating an accumulated driving time of the liquid crystal display panel by accumulating a driving time of the liquid crystal display panel; determining whether or not the accumulated driving time has reached a deterioration reference time; and when the accumulated driving time is determined to have reached the deterioration reference time, changing a gate-off voltage applied to a gate terminal of the switching transistor and a common voltage applied to the common electrode. ### Claim 2 (depends on 1) The method of claim 1, wherein a gate-on voltage applied to the gate terminal of the switching transistor is not changed. ### Claim 3 A method of driving a liquid crystal display panel, the liquid crystal display panel comprising: a liquid crystal display pixel comprising a liquid crystal structure comprising a pixel electrode, a liquid crystal layer, and a common electrode; a switching transistor connected between the pixel electrode of the liquid crystal structure and a data-line; and a storage capacitor connected to the pixel electrode of the liquid crystal structure, the method comprising: calculating an accumulated driving time of the liquid crystal display panel by accumulating a driving time of the liquid crystal display panel; determining whether or not the accumulated driving time has reached first through (k)-th deterioration reference times, wherein k is an integer greater than or equal to 2; and when the accumulated driving time is determined to have sequentially reached the first through (k)-th deterioration reference times, sequentially changing a gate-off voltage applied to a gate terminal of the switching transistor and a common voltage applied to the common electrode. ### Claim 4 (depends on 3) The method of claim 3, wherein a gate-on voltage applied to the gate terminal of the switching transistor is not changed. ### Claim 5 (depends on 4) The method of claim 4, wherein the gate-off voltage is sequentially reduced as the accumulated driving time sequentially reaches the first through (k)-th deterioration reference times, and wherein a voltage difference between the gate-on voltage and the gate-off voltage is sequentially increased as the gate-off voltage is sequentially reduced. ### Claim 6 (depends on 5) The method of claim 5, wherein the gate-off voltage is sequentially reduced in the order of first through (k)-th gate-off voltages as the accumulated driving time sequentially reaches the first through (k)-th deterioration reference times, the first through (k)-th gate-off voltages being mapped to the first through (k)-th deterioration reference times, respectively. ### Claim 7 (depends on 5) The method of claim 5, wherein the gate-off voltage is sequentially reduced by a reduction amount as the accumulated driving time sequentially reaches the first through (k)-th deterioration reference times. ### Claim 8 (depends on 7) The method of claim 7, wherein the reduction amount is constant as the accumulated driving time sequentially reaches the first through (k)-th deterioration reference times. ### Claim 9 (depends on 7) The method of claim 7, wherein the reduction amount differs as the accumulated driving time sequentially reaches the first through (k)-th deterioration reference times. ### Claim 10 (depends on 3) The method of claim 3, wherein the common voltage is sequentially reduced as the accumulated driving time sequentially reaches the first through (k)-th deterioration reference times. ### Claim 11 (depends on 10) The method of claim 10, wherein the common voltage is sequentially reduced in the order of first through (k)-th common voltages as the accumulated driving time sequentially reaches the first through (k)-th deterioration reference times, the first through (k)-th common voltages being mapped to the first through (k)-th deterioration reference times, respectively. ### Claim 12 (depends on 10) The method of claim 10, wherein the common voltage is sequentially reduced by a reduction amount as the accumulated driving time sequentially reaches the first through (k)-th deterioration reference times. ### Claim 13 (depends on 12) The method of claim 12, wherein the reduction amount is constant as the accumulated driving time sequentially reaches the first through (k)-th deterioration reference times. ### Claim 14 (depends on 12) The method of claim 12, wherein the reduction amount differs as the accumulated driving time sequentially reaches the first through (k)-th deterioration reference times. ### Claim 15 A liquid crystal display device comprising: a liquid crystal display panel comprising: a liquid crystal display pixel comprising a liquid crystal structure comprising a pixel electrode, a liquid crystal layer, and a common electrode; a switching transistor connected between the pixel electrode of the liquid crystal structure and a data-line; and a storage capacitor connected to the pixel electrode of the liquid crystal structure; a backlight configured to provide light to the liquid crystal display panel; a backlight driver configured to drive the backlight; and a liquid crystal display panel driver configured to drive the liquid crystal display panel, wherein the liquid crystal display panel driver is configured to calculate an accumulated driving time of the liquid crystal display panel by accumulating a driving time of the liquid crystal display panel and to reduce a gate-off voltage applied to a gate terminal of the switching transistor and a common voltage applied to the common electrode when the accumulated driving time reaches a deterioration reference time, and wherein the liquid crystal display panel driver is configured to not change a gate-on voltage applied to the gate terminal of the switching transistor. ### Claim 16 (depends on 15) The liquid crystal display device of claim 15, wherein the liquid crystal display panel driver comprises: a scan driver configured to provide a scan signal corresponding to the gate-off voltage and the gate-on voltage to the liquid crystal display panel via scan-lines; a data driver configured to provide a data signal corresponding to a pixel voltage to the liquid crystal display panel via data-lines; a timing controller configured to control the scan driver and the data driver; a power manager configured to provide source power to the scan driver, the data driver, and the timing controller; and a voltage adjuster configured to reduce the common voltage and the gate-off voltage based on the accumulated driving time by interacting with the scan driver and the power manager. ### Claim 17 A liquid crystal display device comprising: a liquid crystal display panel comprising: a liquid crystal display pixel comprising a liquid crystal structure comprising a pixel electrode, a liquid crystal layer, and a common electrode; a switching transistor connected between the pixel electrode of the liquid crystal structure and a data-line; and a storage capacitor connected to the pixel electrode of the liquid crystal structure; a backlight configured to provide light to the liquid crystal display panel; a backlight driver configured to drive the backlight; and a liquid crystal display panel driver configured to drive the liquid crystal display panel, wherein the liquid crystal display panel driver is configured to calculate an accumulated driving time of the liquid crystal display panel by accumulating a driving time of the liquid crystal display panel and to sequentially reduce a gate-off voltage applied to a gate terminal of the switching transistor and a common voltage applied to the common electrode of the liquid crystal structure when the accumulated driving time sequentially reaches first through (k)-th deterioration reference times, wherein k is an integer greater than or equal to 2, and wherein the liquid crystal display panel driver is configured to not change a gate-on voltage applied to the gate terminal of the switching transistor. ### Claim 18 (depends on 17) The liquid crystal display device of claim 17, wherein the liquid crystal display panel driver comprises: a scan driver configured to provide a scan signal corresponding to the gate-off voltage and the gate-on voltage to the liquid crystal display panel via scan-lines; a data driver configured to provide a data signal corresponding to a pixel voltage to the liquid crystal display panel via data-lines; a timing controller configured to control the scan driver and the data driver; a power manager configured to provide source power to the scan driver, the data driver, and the timing controller; and a voltage adjuster configured to reduce the common voltage and the gate-off voltage based on the accumulated driving time by interacting with the scan driver and the power manager. ### Claim 19 (depends on 17) The liquid crystal display device of claim 17, wherein the liquid crystal display panel driver is configured to sequentially reduce the gate-off voltage in the order of first through (k)-th gate-off voltages as the accumulated driving time sequentially reaches the first through (k)-th deterioration reference times, the first through (k)-th gate-off voltages being mapped to the first through (k)-th deterioration reference times, respectively. ### Claim 20 (depends on 17) The liquid crystal display device of claim 17, wherein the liquid crystal display panel driver is configured to sequentially reduce the gate-off voltage by a reduction amount as the accumulated driving time sequentially reaches the first through (k)-th deterioration reference times. ### Claim 21 (depends on 17) The liquid crystal display device of claim 17, wherein the liquid crystal display panel driver is configured to sequentially reduce the common voltage in the order of first through (k)-th common voltages as the accumulated driving time sequentially reaches the first through (k)-th deterioration reference times, the first through (k)-th common voltages being mapped to the first through (k)-th deterioration reference times, respectively. ### Claim 22 (depends on 17) The liquid crystal display device of claim 17, wherein the liquid crystal display panel driver is configured to sequentially reduce the common voltage by a reduction amount as the accumulated driving time sequentially reaches the first through (k)-th deterioration reference times.