Semiconductor device and operating method thereof
AssigneeSamsung Electronics Co., Ltd.
InventorsSEUNG IN NA, DA SOM PARK
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes; a loop filter that receives a differential analog signal and generates a residue signal indicating an error between an analog input signal and an feedback signal, a first ADC that receives the residue signal and generates a first digital representation, a second ADC that receives the analog input signal and generates a second digital representation corresponding to the analog input signal, and a digital to analog converter (DAC) that receives a sum of the first digital representation and the second digital representation and generates the analog feedback signal. At least the first ADC is a multi-bit Successive Approximation Register ADC.
Claims20
A semiconductor device comprising:
- a loop filter that receives a differential analog signal and generates a residue signal indicating an error between an analog input signal and an feedback signal;
- a first analog to digital converter (ADC) that receives the residue signal and generates a first digital representation;
- a second ADC that receives the analog input signal and generates a second digital representation corresponding to the analog input signal;
- and
- a digital to analog converter (DAC) that receives a sum of the first digital representation and the second digital representation and generates the analog feedback signal,
- wherein the first ADC is a multi-bit Successive Approximation Register ADC using a first step voltage.
A semiconductor device comprising:
- a first node that performs a subtract operation between an analog input signal and a feedback signal to generate a differential analog signal;
- a second node that performs an addition operation on a first digital representation and a second digital representation;
- a digital to analog converter (DAC) that generates the feedback signal from an output of the second node;
- a gain block that performs an amplification operation on the differential analog signal;
- a first integrator that performs a first integral operation on the amplified differential analog signal to generate a first integrated result;
- a first filter that performs a first filter operation on the first integrated result, and a second filter that performs a second filter operation on the first integrated result;
- a first sub-node node that performs an addition operation on an output of the first filter and an output of the second filter;
- a second integrator that performs a second integral operation of an output of the first sub-node to generate a second integrated result;
- and
- a fine analog to digital converter (ADC) that generates the first digital representation from the second integral result.
A method of operating a semiconductor device, the method comprising:
- generating a residue signal indicating an error between an analog input signal and a feedback signal using a loop filter that receives a differential analog signal;
- generating a first digital representation from the residue signal using a first analog to digital converter (ADC);
- generating a second digital representation from the analog input signal using a second ADC;
- and
- generating the feedback signal using a digital to analog converter (DAC) that receives a sum of the first digital representation and the second digital representation,
- wherein the first ADC is a multi-bit Successive Approximation Register ADC using a first step voltage.
Dependencies are inferred from the claim text.