Envelope detecting circuit
AssigneeSumitomo Electric Industries, Ltd.
InventorOsamu ANEGAWA
Life of this patent
Estimating the term…
Abstract
An envelope detecting circuit is for generating an envelope signal of an input RF signal as described. The envelope detecting circuit includes an input terminal, an output terminal, a balun, a transistor, and an integrating circuit. The transistor, which is operated in the class B or the class C mode, receives an input signal from the balun, amplifies the input signal, and outputs an amplified signal. The integrating circuit, which is provided between the transistor and the output terminal, provides a series circuit of a resistor and a capacitor between the bias supply and ground. The transistor receives the bias through the resistor. The capacitor holds bottom levels of the amplified signal.
Claims6
1-5. (canceled)
An envelope detecting circuit comprising:
- an input terminal that receives an input radio-frequency (RF) signal;
- an output terminal that outputs an envelope signal of the input RF signal;
- a balm that receives the input RF signal from the input terminal and generates two input signals complementary to each other;
- and
- two envelope detecting units each receiving the input signals from the balun and generating envelope signal in the output terminal,
- wherein the envelope detecting units each provide
- a transistor that receives the input signal from the balun, amplifies the input signal, and outputs an amplified signal in one of current terminals that is connected with the output terminal, the transistor being operated in a class B or a class C mode,
- an integrating circuit provided between the transistor and the output terminal, the integrating circuit including a resistor and a capacitor connected in series between a bias supply and a ground, the transistor being biased in the one of the current terminals by the bias supply through the resistor.
Dependencies are inferred from the claim text.