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US 2019/0198676 A1Published application
Semiconductor structure and method for preparing the same
AssigneeNanya Technology Corporation
InventorsCHENG-HSIEN HSIEH, TSENG-FU LU, JHEN-YU TSAI, CHING-CHIA HUANG, WEI-MING LIAO
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Abstract
The present disclosure provides a semiconductor structure including a substrate, a bottom gate portion disposed in the substrate, a top gate portion stacked over the bottom gate portion, a first channel layer sandwiched between the top gate portion and the bottom gate portion, and a source/drain region disposed in the substrate at two opposite sides of the top gate portion.
Claims20
A semiconductor structure comprising:
- a substrate;
- a bottom gate portion disposed in the substrate;
- a top gate portion stacked over the bottom gate portion:
- a first channel layer sandwiched between the top gate portion and the bottom gate portion;
- and
- a source/drain region disposed in the substrate at two opposite sides of the top gate portion.
3 more elements
A method for preparing a semiconductor structure, comprising:
- providing a substrate;
- forming at least one gate trench in the substrate;
- forming a bottom gate portion in the gate trench, wherein a top surface of the bottom gate portion is lower than an opening of the gate trench;
- forming a channel layer on the bottom gate portion in the gate trench, wherein a top surface of the channel layer is lower than the opening of the gate trench;
- and
- forming a top gate portion on the channel layer in the gate trench.
3 more elements
Dependencies are inferred from the claim text.