High voltage lateral junction diode device

A method of fabricating an integrated circuit (IC), comprising:

• forming in a semiconductor surface layer, doped a first conductivity type, a depletion-mode laterally diffused MOSFET (LDMOS device), including forming a source and a drain doped a second conductivity type within said substrate, a channel region between the source and the drain, a gate dielectric over the channel region a gate over the gate dielectric, and a drift region between said channel region and said drain, wherein said drain also provides a first cathode for a lateral junction diode running in parallel with a path between said source and said drain;
• forming a clamp diode including a second cathode and an anode, wherein said clamp diode is junction-isolated from the LDMOS device by a doped region of the second conductivity type located between said anode and said source, and
• directly connecting said gate to said anode, and directly connecting said source to said second cathode.