Semiconductor device and method of manufacturing a semiconductor device
AssigneeFuji Electric Co., Ltd.
InventorAkimasa KINOSHITA
Life of this patent
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Abstract
A semiconductor device includes a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a second semiconductor layer of a second conductivity type, a first semiconductor region of the first conductivity type, a gate electrode provided via a gate insulating film, an interlayer insulating film, and a barrier metal. At a temperature T (K) and where a guaranteed time of no negative bias temperature instability is L (h), a surface density tTi1 of Ti contained in the barrier metal satisfies: t Ti 1 > 1 1.58 × 10 5 { ln ( L 1.74 × 10 - 8 ) + Ea 473 × k - Ea kT } where, k is Boltzmann's constant, and Ea is activation energy satisfying 1.0 (eV)<Ea<1.5 (eV).
Claims6
A semiconductor device comprising:
- a semiconductor substrate of a first conductivity type;
- a first semiconductor layer of the first conductivity type provided on a front surface of the semiconductor substrate and having an impurity concentration lower than an impurity concentration of the semiconductor substrate;
- a second semiconductor layer of a second conductivity type provided on a first side of the first semiconductor layer, opposite a second side of the first semiconductor layer facing toward the semiconductor substrate;
- a first semiconductor region of the first conductivity type selectively provided in the second semiconductor layer and having an impurity concentration that is higher than the impurity concentration of the semiconductor substrate;
- a gate electrode provided in at least a part on a surface of the second semiconductor layer, between the first semiconductor region and the first semiconductor layer, via a gate insulating film;
- an interlayer insulating film provided on the gate electrode;
- and
- a barrier metal provided on the interlayer insulating film, wherein
- at a temperature T (K) and where a guaranteed time of no negative bias temperature instability is L (h), a surface density tTi1 of Ti contained in the barrier metal satisfies:
- t
- Ti
-
-
- 1
- >
- 1
- 1.58
- ×
- 10
- 5
-
- {
- ln
-
- (
- L
- 1.74
- ×
- 10
- -
- 8
- )
- +
- Ea
- 473
- ×
- k
- -
- Ea
- kT
- }
- where, k is Boltzmann's constant, and Ea is activation energy satisfying 1.0 (eV)<Ea<1.5 (eV).
A method of manufacturing a semiconductor device, the method comprising:
- forming a first semiconductor layer of a first conductivity type on a front surface of a semiconductor substrate of the first conductivity type, the first semiconductor layer having an impurity concentration lower than an impurity concentration of the semiconductor substrate;
- forming a second semiconductor layer of a second conductivity type on first side of the first semiconductor layer, opposite a second side of the first semiconductor layer facing toward the semiconductor substrate;
- selectively forming a first semiconductor region of the first conductivity type in the second semiconductor layer, the first semiconductor region having an impurity concentration higher than the impurity concentration of the semiconductor substrate;
- forming a gate electrode in at least a part on a surface of the second semiconductor layer, between the first semiconductor region and the first semiconductor layer, via a gate insulating film;
- forming an interlayer insulating film on the gate electrode;
- and
- forming a barrier metal on the interlayer insulating film, wherein
- in forming the barrier metal, at a temperature T (K) and where a guaranteed time of no negative bias temperature instability is L (h), a surface density of Ti contained in the barrier metal satisfies:
- t
- Ti
-
-
- 1
- >
- 1
- 1.58
- ×
- 10
- 5
-
- {
- ln
-
- (
- L
- 1.74
- ×
- 10
- -
- 8
- )
- +
- Ea
- 473
- ×
- k
- -
- Ea
- kT
- }
- where, k is Boltzmann's constant, and Ea is activation energy satisfying 1.0 (eV)<Ea<1.5 (eV).
Dependencies are inferred from the claim text.