Air gap spacer with wrap-around etch stop layer under gate spacer

A method for fabricating a semiconductor device, comprising:

• forming a semiconductor structure comprising a functional gate structure on a channel region of a fin structure, wherein the functional gate structure comprises a metal gate, a first spacer layer and an insulator material abutting sidewalls of the functional gate structure and metal gate with a top surface of the insulator material in contact with a bottom surface of the first spacer layer, and a capping layer on a top surface of the metal gate and abutting sidewalls of the spacer layer;
• and a source/drain region on each side of the functional gate structure;
• removing the capping layer and the first spacer layer and exposing the top surface of the insulator material to provide a spacer opening adjacent the sidewalls of the metal gate and above a top surface of the metal gate;
• and
• depositing a dielectric top layer in a portion of the spacer opening and on the top surface of the metal gate, wherein the dielectric top layer seals an air gap positioned in the dielectric top layer, wherein a bottom surface of the air gap is above the top surface of the insulator material.