Method for Producing a Semiconductor Component Having a Channel Stopper Region
AssigneeInfineon Technologies AG
InventorsElmar Falck, Franz-Josef Niedernostheide, Hans-Joachim Schulze
Life of this patent
Estimating the term…
Abstract
A channel stopper region extending from a first main surface into a component layer of a first conductivity type is formed in an edge region of a component region, the edge region being adjacent to a sawing track region. Afterward, a doped region extending from the first main surface into the component layer is formed in the component region. The channel stopper region is formed by a photolithographic method that is carried out before a first photolithographic method for introducing dopants into a section of the component region outside the channel stopper region.
Claims23
A method for producing a semiconductor component, the method comprising:
- forming a channel stopper region extending from a first main surface into a component layer of a first conductivity type in an edge termination region of a component region, the edge termination region being adjacent to a sawing track region;
- and
- forming a doped region extending in the component region from the first main surface into the component layer,
- wherein the channel stopper region is formed by a photolithographic method that is carried out before a first photolithographic method for introducing dopants into a section of the component region outside the channel stopper region.
A method for producing a semiconductor component, the method comprising:
- introducing a first dopant at least into a section of a sawing track region of a semiconductor substrate and which adjoins a component region, through a mask opening of a dopant mask which exposes the section of the sawing track region, wherein a channel stopper region extending laterally from the sawing track region into the component region is formed;
- and
- forming doped regions at a distance from the channel stopper region, the doped regions forming pn junctions with a drift layer in the semiconductor substrate,
- wherein a maximum vertical extent of the channel stopper region perpendicular to a first main surface of the semiconductor substrate is at least double a magnitude of a maximum vertical extent of the doped regions.
Dependencies are inferred from the claim text.