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US 2019/0198607 A1Published application
Semiconductor device, and manufacturing method for same
AssigneeMitsubishi Electric Corporation
InventorsKenji HAMADA, Kazuya KONISHI, Kohei EBIHARA
Life of this patent
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Abstract
A semiconductor device includes an emitter region, a base contact region, a buried region, and a carrier trap region. The emitter region and the base contact region are selectively disposed in the upper surface of the base region while being adjacent to each other. The buried region is disposed in the drift region below the base contact region or the emitter region. The carrier trap region is disposed between the buried region and the base region, and has a carrier lifetime shorter than that of the drift region. The device can improve latch-up breakdown tolerance.
Claims11
A semiconductor device comprising:
- a collector electrode;
- a collector region of a first conductivity type disposed on the collector electrode;
- a drift region of a second conductivity type disposed on the collector region;
- a carrier accumulation region of the second conductivity type disposed on the drift region, the carrier accumulation region having an impurity concentration higher than an impurity concentration of the drift region;
- a base region of the first conductivity type selectively disposed in an upper surface of the carrier accumulation region;
- an emitter region of the second conductivity type and a base contact region of the first conductivity type adjacent to each other, selectively disposed in an upper surface of the base region;
- a gate electrode capable of forming a channel in the base region;
- an emitter electrode connected to the emitter region and the base contact region;
- a buried region of the first conductivity type disposed in the drift region below the base contact region or the emitter region;
- and
- a carrier trap region disposed between the buried region and the base region, the carrier trap region having a carrier lifetime shorter than a carrier lifetime of the drift region.
8 more elements
A method for manufacturing a semiconductor device, the method comprising the steps of:
- forming a collector region of a first conductivity type on a SiC substrate of a second conductivity type;
- forming a drift region of the second conductivity type on the collector region, a carrier accumulation region of the second conductivity type having a higher impurity concentration than the drift region on the drift region, a base region of the first conductivity type in an upper surface of the carrier accumulation region, an emitter region of the second conductivity type and a base contact region of the first conductivity type adjacent to each other in an upper surface of the base region, a buried region of the first conductivity type in the drift region below the base contact region or the emitter region, and a carrier trap region between the buried region and the base region, the carrier trap region having a carrier lifetime shorter than a carrier lifetime of the drift region;
- forming a gate electrode capable of forming a channel in the base region;
- forming an emitter electrode connected to the emitter region and the base contact region;
- and
- forming a collector electrode connected to the collector region,
- wherein after forming a structure from the collector region to the emitter electrode on the SiC substrate, the SiC substrate is removed, and the collector electrode is formed under the collector region exposed by the removal.
4 more elements
(canceled)
A method for manufacturing a semiconductor device, the method comprising the steps of:
- forming a collector region of a first conductivity type on a SiC substrate of a second conductivity type;
- forming a drift region of the second conductivity type on the collector region, a carrier accumulation region of the second conductivity type having a higher impurity concentration than the drift region on the drift region, a base region of the first conductivity type in an upper surface of the carrier accumulation region, an emitter region of the second conductivity type and a base contact region of the first conductivity type adjacent to each other in an upper surface of the base region, a buried region of the first conductivity type in the drift region below the base contact region or the emitter region, and a carrier trap region between the buried region and the base region, the carrier trap region having a carrier lifetime shorter than a carrier lifetime of the drift region;
- forming a gate electrode capable of forming a channel in the base region;
- forming an emitter electrode connected to the emitter region and the base contact region;
- and
- forming a collector electrode connected to the collector region,
- wherein after forming the drift region on the SiC substrate by epitaxial growth, the SiC substrate is removed, the collector region is formed by ion implantation into the drift region exposed by the removal, and the collector electrode is formed under the collector region.
4 more elements
Dependencies are inferred from the claim text.