HIGH-DENSITY FIELD-ENHANCED ReRAM INTEGRATED WITH VERTICAL TRANSISTORS
AssigneeInternational Business Machines Corporation
InventorsTakashi Ando, Pouya Hashemi, Alexander Reznicek
Life of this patent
Estimating the term…
Abstract
A method is presented for integrating a resistive random access memory (ReRAM) device with vertical transistors on a single chip. The method includes forming a vertical field effect transistor (FET) including an epitaxial tip defining a drain terminal and forming the ReRAM device in direct contact with the epitaxial tip of the vertical FET such that a current conducting filament is formed at the epitaxial tip due to electric field enhancement.
Claims20
A method for integrating a resistive memory element with vertical transistors on a single chip, the method comprising:
- depositing a hardmask over an epitaxial material;
- forming spacers adjacent the hardmask and a top section of the epitaxial material;
- exposing a bottom section of the epitaxial material;
- forming a high-k-metal gate (HKMG) in direct contact with the bottom section of the epitaxial material;
- forming a metal gate in direct contact with the HKMG;
- removing the spacers and the hardmask to expose a top section of the epitaxial material;
- and
- depositing an epitaxial growth in direct contact with the epitaxial material.
A method for integrating a resistive random access memory (ReRAM) device with vertical transistors on a single chip, the method comprising:
- forming a vertical field effect transistor (FET) by:
- depositing a hardmask over an epitaxial material;
- forming spacers adjacent the hardmask and a top section of the epitaxial material;
- exposing a bottom section of the epitaxial material;
- forming a high-k-metal gate (HKMG) in direct contact with the bottom section of the epitaxial material;
- forming a metal gate in direct contact with the HKMG;
- removing the spacers and the hardmask to expose a top section of the epitaxial material;
- and
- depositing an epitaxial tip in direct contact with the epitaxial material;
- and
- forming the ReRAM device covering a portion of the epitaxial tip of the vertical FET such that a current conducting filament is formed at the epitaxial tip due to electric field enhancement.
A semiconductor structure, comprising:
- a vertical transistor including an epitaxial tip defining a drain terminal;
- and
- a resistive memory element formed directly on the epitaxial tip of the vertical transistor, the epitaxial tip aligned with the vertical transistor.
Dependencies are inferred from the claim text.