Semiconductor memory device

A semiconductor memory device comprising:

• a first wiring layer above a semiconductor substrate and a first insulating layer therebetween;
• a second wiring layer above the first wiring layer and a second insulating layer therebetween;
• a memory pillar extending in a first direction intersecting the semiconductor substrate and through the first and second wiring layers, the memory pillar comprising a first semiconductor layer, a second semiconductor layer located over the first semiconductor layer, and a third insulating layer, a charge storage layer, and a fourth insulating layer located on a side surface of the second semiconductor layer;
• a first plug contacting and electrically connected to the first wiring layer;
• a second plug contacting and electrically connected to the second wiring layer;
• a first pillar located adjacent to the first plug and extending through the first wiring layer;
• and
• a second pillar located adjacent to the second plug and extending through the first and second wiring layers, the second pillar spaced from the first pillar in a second direction crossing the first direction,
• wherein the first wiring layer is a lowermost wiring layer above the semiconductor substrate and extends, in the second direction, outwardly of the second wiring layer, and
• wherein the distance between the center of the first plug and the center of the first pillar is greater than the distance between the center of the second plug and the center of the second pillar.