Fan-out semiconductor package

A fan-out semiconductor package comprising:

• a first structure including a first semiconductor chip having a first active surface having first and second signal pads disposed thereon and a first inactive surface opposing the first active surface, a first wiring member disposed on the first active surface of the first semiconductor chip and including a first wiring layer that includes first conductors extending in a direction parallel with the first active surface to redistribute the first and second signal pads, a first encapsulant encapsulating at least portions of the first semiconductor chip and the first wiring member, and a connection member disposed on the first encapsulant and the first wiring member and including a redistribution layer that includes second conductors extending in the direction parallel with the first active surface to be electrically connected to the first and second signal pads through the first wiring layer, the first and second signal pads being spaced apart from each other;
• and
• a second structure including a second semiconductor chip having a second active surface having third and fourth signal pads disposed thereon and a second inactive surface opposing the second active surface, a second wiring member disposed on the second active surface of the second semiconductor chip and including a second wiring layer that includes third conductors extending in a direction parallel with the second active surface to redistribute the third and fourth signal pads, a second encapsulant encapsulating at least portions of the second semiconductor chip and the second wiring member, and conductive bumps disposed on the second active surface and electrically connected to the third and fourth signal pads through the second wiring layer, the third and fourth signal pads being spaced apart from each other,
• wherein the first and second structures are disposed so that the first and second active surfaces face each other,
• the conductive bumps are electrically connected to the redistribution layer,
• the first and fourth signal pads face each other in a cross section,
• the second and third signal pads face each other in the cross section,
• the first and third signal pads are redistributed to be connected to each other in a signal manner, and
• the second and fourth signal pads are redistributed to be connected to each other in a signal manner.

A fan-out semiconductor package comprising:

• a first semiconductor chip having a first active surface having first connection pads disposed thereon;
• a redistribution layer disposed on the first active surface of the first semiconductor chip and electrically connected to the first connection pads;
• a second semiconductor chip having a second active surface having second connection pads disposed thereon, wherein the second semiconductor chip is disposed to have the second active surface facing and overlapping with the first active surface of the first semiconductor chip;
• and
• conductive bumps disposed on the second active surface and electrically connecting second connection pads to the redistribution layer,
• wherein the redistribution layer includes a resistance pattern in a conductive line electrically connected to at least one of the first and second connection pads.