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US 2019/0198445 A1Published application
Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling same
AssigneeIntel Corporation
InventorsAmruthavalli Pallavi Alur, Sri Ranga Sai Boyapati, Robert Alan May, Islam A. Salama, Robert L. Sankman
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Abstract
An embedded multi-die interconnect bridge apparatus and method includes photolithographically formed interconnects coupled to laser-drilled interconnects. Several structures in the embedded multi-die interconnect bridge apparatus exhibit characteristic planarization during fabrication and assembly.
Claims20
A semiconductor package apparatus, comprising:
- a recess in a semiconductor package substrate, wherein the semiconductor package substrate includes a frusto-conical filled via that contacts a bond pad, wherein the bond pad contacts a right-cylindrical package pillar;
- a lamination that contacts the bond pad and the right-cylindrical package pillar;
- a package bond pad that contacts the lamination and the right-cylindrical opposite the bond pad;
- an electrical bump that contacts the package bond pad;
- and
- a patterned photoresist layer on the lamination and that partially exposes the package bond pad.
3 more elements
A computing system, comprising:
- a bridge die disposed in a recess of a semiconductor package substrate, wherein the semiconductor package substrate includes a frusto-conical filled via coupled to a right-cylindrical package pillar;
- an encapsulation material contacting the bridge die and the recess;
- an adhesive contacting the bridge die, the recess and the encapsulation material;
- a lamination above the right-cylindrical package pillar and the bridge die, wherein the bridge die includes a bridge-die bond pad;
- an electrical bump coupled to the right-cylindrical package pillar and an electrical bump that is coupled to the bridge-die bond pad;
- a first semiconductive device coupled to the electrical bump coupled to the right-cylindrical package pillar;
- a subsequent semiconductive device coupled to the electrical bump that is coupled to the bridge-die bond pad;
- a fourth semiconductive device coupled to the bridge die, wherein the fourth semiconductive die is adjacent the first and subsequent semiconductive devices;
- a mid-level interconnect on a back surface of the semiconductor package substrate, wherein the mid-level interconnect contacts a tapered via;
- an interposer coupled to the mid-level interconnect;
- and
- a board coupled to the interposer.
9 more elements
A semiconductor package apparatus, comprising:
- a bridge die disposed in a recess of a semiconductor package substrate, wherein the semiconductor package substrate includes a frusto-conical filled via characteristic of laser drilling coupled to a right-cylindrical package pillar characteristic of photolighographic patterning;
- at least one through-silicon via (TSV) that communicates through the bridge die to couple with at least one of a trace and a bond pad within the semiconductor package substrate;
- a lamination above the package pillar and the bridge die, wherein the bridge die includes a bridge-die bond pad;
- an encapsulation material contacting the bridge die and the recess;
- an adhesive contacting the bridge die, the recess and the encapsulation material;
- an electrical bump that is coupled to the package pillar and an electrical bump that is coupled to the bridge-die bond pad;
- a first semiconductive device coupled to the electrical bump that is coupled to the package pillar;
- and
- a subsequent semiconductive device coupled to the electrical bump that is coupled to the bridge-die bond pad.
6 more elements
Dependencies are inferred from the claim text.