Interposer substrate and semiconductor package

A semiconductor package comprising:

• a substrate;
• a semiconductor chip mounted on the substrate;
• an interposer substrate disposed on the semiconductor chip and electrically connected to the substrate;
• and
• connecting terminals connecting the substrate and the interposer substrate,
• wherein the interposer substrate includes:
• a core insulating layer having an embedded wiring layer;
• a lower insulating layer disposed below the core insulating layer and having a recess recessed from a lower surface facing the semiconductor chip;
• a dummy wiring layer disposed between the embedded wiring layer and the semiconductor chip above the recess, the dummy wiring layer being electrically floating;
• and
• an interconnecting wiring layer disposed on a lower surface of the lower insulating layer and connected to the connecting terminals, on a periphery of the recess.

An interposer substrate comprising:

• a core insulating layer having an embedded wiring layer;
• a lower insulating layer disposed below the core insulating layer and having a recess recessed from a lower surface at the center of the lower surface;
• and
• a dummy wiring layer disposed on a lower surface of the core insulating layer above the recess,
• wherein the dummy wiring layer is electrically floating.