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US 2019/0198410 A1Published application
Semiconductor package and method of manufacturing the same
AssigneeSamsung Electro-Mechanics Co., Ltd.
InventorYong-Ho BAEK
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Abstract
A semiconductor package and a method of manufacturing a semiconductor package are disclosed. The semiconductor package including a first substrate including a first cavity, a cavity mold configured to be inserted into the first cavity and including a second cavity, an electronic component inserted in the second cavity, and a second substrate formed on a surface of the first substrate, a surface of the cavity mold and a surface of the electronic component.
Claims8
A method of manufacturing a semiconductor package, comprising:
- preparing a first substrate comprising a first cavity formed;
- preparing a cavity mold comprising a second cavity;
- inserting an electronic component in the second cavity;
- inserting the cavity mold in the first cavity,
- wherein one surface of the first substrate, one surface of the cavity mold, and one surface of the electronic component are on a same plane;
- and
- forming a second substrate on a surface of the first substrate, a surface of the cavity mold, and a surface of the electronic component.
4 more elements
Dependencies are inferred from the claim text.