US 2019/0198132 A1 · LIST INSERTION IN TEST SEGMENTS WITH NON-NATURALLY ALIGNED DATA BOUNDARIES

Abstract

A processor memory is stress tested with a variable list insertion depth using list insertion test segments with non-naturally aligned data boundaries. List insertion test segments are interspersed into test code of a processor memory tests to change the list insertion depth without changing results of the test code. The list insertion test segments are the same structure as the segments of the test code and have non-naturally aligned boundaries. The list insertion test segments include list insertion segments and load/store segments. The list insertion segments locate a current memory location using a fixed segment at a known location. The load/store segments load and store list elements in memory.

Claims20

Dependent claims

An apparatus for testing a computer processor having a plurality of registers comprising:

a test case generator that creates test cases with test code for testing the computer processor;
a test case executor that replicates the test code and loads the test code into non-naturally aligned segments of consecutive memory locations on the computer processor;
a load-store unit that loads and stores data in the memory locations and loads and stores data in the plurality of registers;
wherein the test case executor further adds one or more list insertion test segments, wherein each list insertion test segment comprises a list insertion segment and a load/store segment, the one or more list insertion test segments interspersed in the test code in non-naturally aligned segments that insert a list element into at least one of a plurality of list element locations using a fixed segment stored at a fixed location on the computer processor.

1 more element

A computer-implemented method executed by at least one processor for testing a computer processor comprising:

providing test code in a plurality of segments with non-naturally aligned boundaries;
interspersing a plurality of list insertion test segments with non-naturally aligned boundaries into the test code segments;
and
executing the test code with the interspersed list insertion test segments to insert a list element into at least one of a plurality of list element locations using a fixed segment stored at a fixed location on the computer processor.

1 more element

A computer-implemented method executed by at least one processor for testing a computer processor comprising:

providing test code in a plurality of segments with non-naturally aligned boundaries;
interspersing a plurality of list insertion test segments that have non-naturally aligned boundaries into the test code segments comprising:
providing a plurality of list insertion segments;
providing a plurality of load/store segments;
and
wherein each list insertion segment branches to a fixed segment that determines a first list element location and that includes a second list element location, and
wherein each load/store segment that loads a list element stored in the second list element location, stores the list element in the first list element location;
and
executing the test code with the interspersed list insertion test segments to insert a list element into at least one of a plurality of list element locations using a fixed segment stored at a fixed location on the computer processor.
determining the second list element location by:
storing an address to a next consecutive memory location contained in a link register of the computer processor into one of a plurality of general purpose registers of the computer processor;
branching to the fixed segment and storing an address to the first list element location contained in the link register into a second of the plurality of general purpose registers;
calculating an address to a return memory location consecutive to the first list element location and storing the return memory location to the link register;
and
branching to the return memory location, wherein after branching the link register contains an address a second list element location;
storing the address of the second list element location into the second of the plurality of general purpose register;
and
restoring the address to the next consecutive memory location to the link register.

15 more elements

Dependencies are inferred from the claim text.

List insertion in test segments with non-naturally aligned data boundaries

Life of this patent

List insertion in test segments with non-naturally aligned data boundaries

Life of this patent

Abstract

Claims20