Non-volatile memory array with memory gate line and source line scrambling

A method, comprising:

• providing a non-volatile memory (NVM) array, wherein the non-volatile memory array includes at least four non-volatile memory (NVM) cells coupled in a same column of the NVM array, wherein each NVM cell includes a memory gate and a select gate, wherein first and second NVM cells of the at least four NVM cells share a first source line, and third and fourth NVM cells share a second source line;
• coupling the first source line to a first common electrical node to form a first source line group, wherein the first source line group includes at least another source line of the same column that is not adjacent to the first source line;
• coupling the second source line to a second common electrical node to form a second source line group, wherein the second source line group includes at least another source line of the same column that is not adjacent to the second source line;
• and
• selecting the first NVM cell for a program operation while deselecting the second NVM cell for the program operation, comprising:
• coupling a high program voltage to a first memory gate of the first NVM cell and a low inhibit voltage to a second memory gate of the second NVM cell;
• and
• coupling two different source voltages to the first and second source line groups.

A method of operating a memory array, comprising:

• obtaining the memory array comprising non-volatile memory (NVM) cells, each including a memory gate and a select gate, arranged in rows and columns, wherein:
• two adjacent NVM cells of a same column that share a source region form an NVM pair, and wherein multiple NVM pairs are coupled to one another in the same column;
• at least two memory gates of NVM cells of a same row share a memory gate line;
• at least two source regions of NVM cells of the same row share a source line;
• and
• configuring a source line connection routing that provides multiple common electrical nodes to form at least two source line groups, further comprising:
• selecting multiple source lines to form a source line group, wherein the multiple source lines in the source line group are not physically adjacent to one another;
• forming multiple source line groups;
• and
• coupling each of the multiple common electrical node to one of the multiple source line groups to receive a same voltage signal.