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AssigneeIntel Corporation
InventorsRavi Pillarisetty, Prashant Majhi, Elijah V. Karpov, Niloy Mukherjee, James S. Clarke
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Substrates, assemblies, and techniques for enabling a resistive random access memory cell are disclosed herein. For example, in some embodiments, a device may include a top electrode, a modulated interfacial region, and a bottom electrode. The thickness of the modulated interfacial region can be modulated between an on state thickness and an off state thickness and the bottom electrode is an active electrode that is a source for metal ions for the creation of a filament between the top electrode and the bottom electrode. In an example, the filament is created when the transistor is in an on state and the filament is not present when the transistor is in an off state.
1-25. (canceled)
A memory device, comprising:
An integrated circuit (IC) die, comprising:
A computing device, comprising:
Dependencies are inferred from the claim text.