Memory device

A memory device comprising:

• a first contact;
• a second contact;
• a first nanotube electrically coupled to the first contact;
• a second nanotube electrically coupled to the second contact;
• a transistor having a first node, a second node and a control node, wherein the second node is electrically coupled to the second contact, and the control node is configured to activate a channel between the first node and the second node;
• and
• wherein the first nanotube electrically connects the second nanotube to form a non-volatile closed state of the memory device, or electrically disconnects the second nanotube to form a non-volatile open state of the memory device, wherein the non-volatile closed state represents a first logic state and the non-volatile open state represents a second logic state.

A memory device comprising:

• a first contact;
• a second contact;
• a transistor having a first node, a second node and a control node, wherein the second node is electrically coupled to the second contact, and the control node is configured to activate a channel between the first node and the second node;
• and
• a nanotube, wherein the nanotube electrically connects the first contact and the second contact to form a non-volatile closed state of the memory device, or electrically disconnects the first contact and the second contact to form a non-volatile open state of the memory device, wherein the non-volatile closed state represents a first logic state and the non-volatile open state represents a second logic state.