Techniques for multi-read and multi-write of memory circuit

A circuit comprising:

• a memory circuit including a set of memory cells coupled to respective bit lines and a same word line, wherein the bit lines are coupled to a same bit line precharge line;
• and
• a memory controller to:
• precharge the bit lines using the bit line precharge line;
• assert, after the precharge, a word line signal on the word line for a time period;
• and
• write data sequentially to the set of memory cells during the time period.

One or more non-transitory, computer-readable media having instructions, stored thereon, that when executed cause a memory controller to:

• precharge bit lines associated with respective memory cells of a set of memory cells that are multiplexed with a sense amplifier;
• provide a single assertion of a word line signal to the set of memory cells;
• and
• consecutively read data from the set of memory cells based on the precharge and the single assertion of the word line signal.