Memory device for controlling refresh operation by using cell characteristic flags

A refresh method of a memory device, the method comprising:

• receiving a refresh command;
• performing a count operation to generate refresh row addresses respectively corresponding to a plurality of memory cell rows of a memory cell array based on the refresh command;
• storing, in a plurality of storage cells of a flag storage, flags that respectively correspond to the refresh row addresses, the plurality of storage cells arranged in rows and columns of the flag storage, each of the flags indicating a type of a memory cell row corresponding to the flag from among the plurality of memory cell rows;
• accessing a storage cell row of the flag storage by using bits of a first group of the refresh row addresses;
• accessing storage cell columns of the flag storage by using bits of a second group of the refresh row addresses;
• selecting one of the accessed storage cell columns by using bits of a third group of the refresh row addresses;
• reading a first flag stored in a first storage cell to which the accessed storage cell row and the selected storage cell column correspond among the plurality of storage cells;
• and
• refreshing a memory cell row corresponding to the refresh row addresses based on the first flag,
• wherein the bits of the first, second, and third groups of the refresh row address are different from each other.

A memory system comprising:

• a memory controller transmitting a refresh command;
• and
• a memory device communicatively coupled to the memory controller, the memory device including
• a memory cell array including a plurality of memory cell rows;
• a refresh counter configured to perform a count operation based on the refresh command and to generate refresh row addresses respectively corresponding to the plurality of memory cell rows;
• a flag storage including a plurality of storage cells arranged in rows and columns, the plurality of storage cells being configured to store flags respectively corresponding to the plurality of memory cell rows, each of the flags indicating a type of a memory cell row corresponding to the flag from among the plurality of memory cell rows;
• a decoder coupled to the flag storage and configured to access a storage cell row and a storage cell column of the flag storage based on the refresh row addresses;
• and
• a sense amplifier coupled to the flag storage and configured to select a storage cell to which the accessed storage cell row and the accessed storage cell column correspond from among the plurality of storage cells.