Methods and apparatus for synchronizing communication with a memory controller
AssigneeRambus Inc.
InventorsScott C. Best, Richard E. Warmke, David B. Roberts, Frank Lambrecht
Life of this patent
Estimating the term…
Abstract
A memory controller receives data and phase-providing signals from a memory device. The phase-providing signal is not a clock signal, but is used by the memory controller to phase align a local data-sampling signal with the incoming data. The memory controller samples the data signal with the data-sampling signal. The memory controller can perform maintenance operations to update the phase relationship between the phase-providing and data-sampling signals.
Claims20
(canceled)
An apparatus to communicate with a memory, the memory to issue read data accompanied by a strobe signal, the apparatus comprising:
- a clock input to receive a reference clock signal;
- a data input to receive the read data from the memory;
- a strobe input to receive the strobe signal accompanying the read data from the memory;
- a loop circuit coupled to the clock input and the strobe input, the loop circuit to derive a data-sampling clock signal from the reference clock signal and phase lock the data-sampling clock signal to the strobe signal;
- and
- a receiver coupled to the loop circuit and the data input, the receiver to sample the read data responsive to the data-sampling clock signal.
A method comprising:
- receiving a reference clock signal;
- generating a data-sampling clock signal from the reference clock signal;
- receiving a strobe signal;
- phase aligning the data-sampling clock signal to the strobe signal;
- and
- sampling a data signal responsive to the data-sampling clock signal.
An apparatus to communicate with a memory, the memory to issue read data accompanied by a strobe signal, the apparatus comprising:
- a clock input to receive a reference clock signal;
- a data input to receive the read data from the memory;
- a strobe input to receive the strobe signal accompanying the read data from the memory;
- means for deriving a data-sampling clock signal from the reference clock signal and phase locking the data-sampling clock signal to the strobe signal;
- and
- a receiver coupled to the loop circuit and the data input, the receiver to sample the read data responsive to the data-sampling clock signal.
Dependencies are inferred from the claim text.