Voltage reference computations for memory decision feedback equalizers
AssigneeMicron Technology, Inc.
InventorsRaghukiran Sreeramaneni, Jennifer E. Taylor
Life of this patent
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Abstract
A device includes a signal input to receive a data input as part of a bit stream. The device also includes a reference input to receive a reference signal. The device further includes push circuitry to receive a first weight value, receive a first correction value, and generate a push signal based on the first weight value and the first correction value to selectively modify the data input as well as pull circuitry to receive a second weight value, receive a second correction value, and generate a pull signal based on the second weight value and the second correction value to selectively modify the data input.
Claims20
A device, comprising:
- a signal input configured to receive a data input as part of a bit stream;
- a reference input configured to receive a reference signal;
- push circuitry configured to:
- receive a first weight value;
- receive a first correction value;
- and
- generate a push signal based on the first weight value and the first correction value to selectively modify the data input;
- and
- pull circuitry configured to:
- receive a second weight value;
- receive a second correction value;
- and
- generate a pull signal based on the second weight value and the second correction value to selectively modify the data input.
A device, comprising:
- an equalizer, comprising:
- a first input configured to receive a data input;
- a first adjustment circuit, comprising:
- a first adjustment input configured to receive a first adjustment signal;
- and
- a first output configured to transmit a first bit distortion correction value based upon the first adjustment signal;
- and
- a second adjustment circuit, comprising:
- a second adjustment input configured to receive a second adjustment signal;
- and
- a second output configured to transmit a second bit distortion correction value based upon the second adjustment signal, wherein the first bit distortion correction value and the second bit distortion correction value are applied to the data input to generate a modified data input based upon a previously received data input at the equalizer.
A device, comprising:
- a first equalizer, comprising:
- a data input configured to receive a distorted bit of a bit stream;
- and
- a first adjustment circuit configured to transmit adjustment signals to compensate for inter-symbol interference of the distorted bit due to a previously received data input of the bit stream;
- and
- a second equalizer, comprising:
- a second data input configured to receive a second distorted bit of the bit stream;
- and
- a second adjustment circuit configured to transmit second adjustment signals to compensate for inter-symbol interference of the second distorted bit due to the distorted bit of the bit stream.
Dependencies are inferred from the claim text.