Hardware architecture for simulating a neural network of neurons
AssigneeInternational Business Machines Corporation
InventorsRodrigo Alvarez-Icaza Rivera, John V. Arthur, Andrew S. Cassidy, Pallab Datta, Paul A. Merolla, Dharmendra S. Modha
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Abstract
Embodiments of the invention relate to a neural network system for simulating neurons of a neural model. One embodiment comprises a memory device that maintains neuronal states for multiple neurons, a lookup table that maintains state transition information for multiple neuronal states, and a controller unit that manages the memory device. The controller unit updates a neuronal state for each neuron based on incoming spike events targeting said neuron and state transition information corresponding to said neuronal state.
Claims12
A system comprising:
- at least one processor;
- and
- a non-transitory processor-readable memory device storing instructions that when executed by the at least one processor causes the at least one processor to perform operations including:
- mapping a neuronal model to a two-variable neuronal model;
- defining a phase plane for the two-variable neuronal model;
- coarsely sampling the phase plane to obtain state transition information for multiple neuronal states;
- and
- mapping the state transition information on to a lookup table for use in a hardware architecture for simulating a neural network.
A method comprising:
- mapping a neuronal model to a two-variable neuronal model;
- defining a phase plane for the two-variable neuronal model;
- coarsely sampling the phase plane to obtain state transition information for multiple neuronal states;
- and
- mapping the state transition information on to a lookup table for use in a hardware architecture for simulating a neural network.
A non-transitory computer readable storage medium including instructions to perform a method comprising:
- mapping a neuronal model to a two-variable neuronal model;
- defining a phase plane for the two-variable neuronal model;
- coarsely sampling the phase plane to obtain state transition information for multiple neuronal states;
- and
- mapping the state transition information on to a lookup table for use in a hardware architecture for simulating a neural network.
Dependencies are inferred from the claim text.